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CVS commit: src/sys/arch/powerpc/powerpc



Module Name:    src
Committed By:   scw
Date:           Tue Apr 29 15:16:15 UTC 2003

Modified Files:
        src/sys/arch/powerpc/powerpc: trap_subr.S

Log Message:
Put an isync at the end of the RESTORE_SRS() macro. This is the
recommended workaround for a mtsr/mtsrin errata with PPC750 cpus.


To generate a diff of this commit:
cvs rdiff -r1.37 -r1.38 src/sys/arch/powerpc/powerpc/trap_subr.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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