In article <20040428123820.06B882DA1D@cvs.netbsd.org>
pk@netbsd.org wrote:

> Module Name:	src
> Committed By:	pk
> Date:		Wed Apr 28 12:38:20 UTC 2004
> 
> Modified Files:
> 	src/sys/arch/sparc/sparc: iommu.c
> 
> Log Message:
> Rename `sc_hasiocache' => `sc_cachecoherent'. Avoid the cache flush in
> dma_load() if we have coherency.

Anyway cache flush should be done by bus_dmamap_sync()
and bus_dmamap_load() should not do it.
---
Izumi Tsutsui
tsutsui@ceres.dti.ne.jp