Subject: CVS commit: [netbsd-3] src/sys/arch/i386/pci
To: None <source-changes@NetBSD.org>
From: Matthias Scheler <tron@netbsd.org>
List: source-changes
Date: 01/29/2007 16:14:13
Module Name: src
Committed By: tron
Date: Mon Jan 29 16:14:13 UTC 2007
Modified Files:
src/sys/arch/i386/pci [netbsd-3]: pchb.c
Log Message:
Pull up following revision(s) (requested by he in ticket #1657):
sys/arch/i386/pci/pchb.c: revision 1.63
According to http://www.intel.com/design/chipsets/specupdt/290639.htm,
the BIOS bug workaround for the i82443BX chipset's DRAM leadoff timing
parameter is not needed for revisions >= C0, so avoid tweaking that
parameter in that case.
Earlier, this would trigger NMIs on fully memory-populated Compaq
1850R systems, where the BIOS appears to program and require a non-
standard value for this parameter.
Thanks to Chris Ross for the diagnosis and the fix!
To generate a diff of this commit:
cvs rdiff -r1.55.4.2 -r1.55.4.3 src/sys/arch/i386/pci/pchb.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.