CVS commit: src/sys/arch/arm/rockchip

["SAITOH Masanobu" <msaitoh%netbsd.org@localhost>]

Module Name:    src
Committed By:   msaitoh
Date:           Thu May 20 01:41:55 UTC 2021

Modified Files:
        src/sys/arch/arm/rockchip: rk_cru_composite.c

Log Message:
Fix wrong calculation found by kUBSan. OK'd by jmcneill.

 The output was:
    UBSan: Undefined Behavior in ../../../../arch/arm/rockchip/
    rk_cru_composite.c:86:21, unsigned integer overflow: 0 divrem 0 cannot be
    represented in type 'unsigned int'


To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/rockchip/rk_cru_composite.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.