Arne Jansen wrote:

>  - cache: if I enable the instruction cache, the box crashes in
>    an early boot phase (no output yet). I am not sure at which
>    point in bootup to enable the cache and if there is cache
>    support built into the powerpc port. What might be critical
>    with cache operation?

Is the data cache also enabled?

The last half year we worked with the Linux PPC port for the MPC860,
which enables instruction & data caches & MMU translations. 
In our experiences this works without any problem. I saw that many times
caches are flushed!

I have only seen the source code Querbach, so I don't know about
Masanari source tree w.r.t. to the caches, but I know that e.g. buffers
used in buffer descriptors (SCCs, SMCs) have to be in non-cachable data.

>  - stdargs: when using egcs 1.1.1 the above described problem
>    do not occur. But there is a problem with added softfloat
>    support, because the header assumes hardware floating point.
>    I modified the header, but am not sure how to integrate the
>    modification into the tree, i.e. which macro to use
>    (SOFTFLOAT? _SOFT_FLOAT? __SOFT_FLOAT?).

The Linux PPC also implements a soft floating library for the MPC8(2)xx.

>  - Did anyone build a flash filesystem taking flash write cycles
>    and limited space (compression) into account?

Micro monitor http://www.bell-labs.com/topic/swdist may be interesting?

>    (or suggested) for minimal operation, and stripped down rc files?
>  - (more to follow)

> Again, if anyone is willing to help or interested in the work already
> done, feel free to contact me. But before I can give any work away

Interested: yes!

> Arne

-- 
Willy Jacobs
mailto:wn.jacobs@net.hcc.nl