Re: interprocessor communication

[Hubert Feyrer <hubert%feyrer.de@localhost>]

On Sat, 24 Sep 2005 jerry%evasefor.com@localhost wrote:
> Good afternoon list,
> I have an SBC with 2 cpu each running their own netbsd kernel:
>
> PHY--CPU1-----------logic---------CPU2---PHY
>            mii bus         mii bus
>
> after I'm done processing a packet on CPU1 how can I address it
> to CPU2? Is there a kernel level interface to the MII bus I could
> use for this (i.e read/write)? Or any other idea, like shared memory,
> anything that you think could work?

As far as I understand, NetBSD can attach ethernet drivers to the MII bus 
using the "phy" interface. Maybe the (software) interfaces used there are 
useful for you?

        ex0 at pci2 dev 1 function 0: 3Com 3c905CX-TX 10/100 Ethernet with 
mngmt (rev. 0x40)
        ex0: interrupting at irq 7
        ex0: MAC address 00:26:54:10:11:d4
===> ukphy0 at ex0 phy 2: Generic IEEE 802.3u media interface
        ukphy0: OUI 0x0010a9, model 0x0012, rev. 1
        ukphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto

See mii(4) for a bit more data. And the various drivers mentioned in 
there, and of course their source (probably in src/sys/dev/mii).

I'm not competent to talk about either the MII bus or the driver 
infrastructure though. I think asking that on tech-net or tech-kern may 
get you better answers, this is not really specific to embedded 
technology.


 - Hubert