Re: Naming of peripheral bus on SoC's

["Toru Nishimura" <locore64%alkyltechnology.com@localhost>]

Simon Burge asked me;

> I'm curious to see what you think is wrong about the current PPC405
> implementation.  As far as I know, the current plb/opb interconnects
> used are the same in both the 405 and 440 product lines.

1. My preference is just to have a plain "on-chip bus" w/o any locators like
[addr] and  [irq].  These locators are remains on 'pre-PnP' bus devices
that need external adjustments (by HW switch and SW construct) to
work correctly.  The locators would not cope with multiple IRQ and
discreat address register layout (both plain common in SoC) anyway.
Please keep in mind I never intend to have "universal ocbus" in any
sense.
2. I (and probably many) take less care about what documented functional
block diagrams tell and "internal bus" topology.
3. I believe in "intented ambiguity" is art of design, which in meanwhile
allows to growth and diversity, and probably ease of use.

opb/plb distinction is a matter of HW implementation just like which type
of threads to knit the kuilts.  Given the similarity of (or contrast to) IBM
CPC700 controller with 405/440/460 internals, I doubt the usefulness
of NetBSD opb/plb.

Toru Nishimura / ALKYL Technology