: It's the quick and dirty route to getting an SMP version out the door
: under budgetary or market timing constraints. 
:
: To do it right, sections of code have to be rewritten to make the code as
: parallel as possible. 

How is that different from taking out fine grain locks?  Or does the
rewrite make it possible to hold these locks for shorter periods of
time and have the synergistic effect of causing less lock contention.
If there is a good reference to this, I would love to be enlightened
by it.

: Caching also works very differently with multiple CPU's.

That's true no matter how you do SMP (or even ASMP)...

Warner