WHilst I don't want to enter into this discussion, those in the cc-list
might be interested to know of another profiling technique that was
written up a few years ago for an AUUG conference (possibly AUUG'92).

THe paper described the problems in timing (accurately) kernel functions
and detailed a solution: hardware buffer and timing into a separate buffer
with a PROM, plugged between the CPU and the m/b.  Of course it was only
really effective when caches were not present/disabled, but the only over-
head was a single assembly instruction which set a certain pattern on the
address lines and the PROM recognised this as a start/stop timing.  Don't
know if it would work on an intel chip but the paper discussed 68k chips.