Subject: Re: bus.h style question
To: Scott Reynolds <scottr@plexus.com>
From: Jason Thorpe <thorpej@nas.nasa.gov>
List: tech-kern
Date: 08/14/1997 23:23:54
On Thu, 14 Aug 1997 15:56:41 -0500 (CDT)
Scott Reynolds <scottr@Plexus.COM> wrote:
> > >Could I use bus_space_read_4 savely to get value? Are there alignement
> > >constraints in the bus.h interface?
> >
> > I've wondered that as well. My guess would have to be yes.
>
> There are no alignment constraints specified, that I'm aware of. It is
> certainly something that needs to be kept in mind when writing an MI
> driver.
That is incorrect. There _are_ explicit alignment constraints on the
read/write multi/region methods.
> There is no byte swapping done by bus_space. As Leo (I think) points out,
> you may or may not need it for some hardware. A simple example that
> hasn't been mentioned is the DP8390 Ethernet controller; it can be
> configured for either big- or little-endian modes.
For some busses, the only sane way to treat them is their "native" byte
order. I.e. ISA, EISA, and PCI should all be considered "little endian".
It's my opinion that the bus_space_* functions _should_ perform the
necessary byte swapping, and the components on boards should always
be configured for the byte order they'd be configured if the processor
were little-endian.
Of course, this makes using the 16-bit or 32-bit methods for octet streams
a bit difficult...
Jason R. Thorpe thorpej@nas.nasa.gov
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