spl(9) manpage says
>>   In order of highest to lowest priority, the priority-raising
>>   functions are:
	:
      [snip]
	:
>> 	splsoftnet()	blocks soft network interrupts.
>> 
>>   Two functions lower the system priority level.  They are:
>> 
>> 	splsoftclock()	unblocks all interrupts but the soft clock
>> 			interrupt.
>> 
>> 	spl0()		unblocks all interrupts.

In short, splsoftnet() *raises* spl to (at least) softnet, and
splsoftclock() *lowers* spl to softclock, and i386 seems to follow this
description.

but,

on sys/arch/alpha/include/intr.h:
	/* IPL-lowering/restoring macros */
	#define splx(s)							\
	    ((s) == ALPHA_PSL_IPL_0 ? spl0() : alpha_pal_swpipl(s))
	#define splsoft()               alpha_pal_swpipl(ALPHA_PSL_IPL_SOFT)
	#define splsoftclock()          splsoft()
	#define splsoftnet()            splsoft()
that is, both splsoftclock() and splsoftnet() *lower* spl.
alpha's splsoftnet() seems to be wrong.

on sys/arch/mips/mips/locore.S:
	LEAF(splsoftclock)
		mfc0	v0, MIPS_COP_0_STATUS_REG	# read status register
		li	t0, ~MIPS_SOFT_INT_MASK_0	# disable soft clock
		and	t0, t0, v0
		mtc0	t0, MIPS_COP_0_STATUS_REG	# save it
		nop					# 3 ins to disable
		j	ra
		and	v0, v0, (MIPS_INT_MASK | MIPS_SR_INT_IE)
	END(splsoftclock)
	LEAF(splsoftnet)
		mfc0	v0, MIPS_COP_0_STATUS_REG	# read status register
		li	t0, ~(MIPS_SOFT_INT_MASK_1|MIPS_SOFT_INT_MASK_0)
		and	t0, t0, v0
		mtc0	t0, MIPS_COP_0_STATUS_REG	# save it
		j	ra
		and	v0, v0, (MIPS_INT_MASK | MIPS_SR_INT_IE)
	END(splsoftnet)
that is, both splsoftclock() and splsoftnet() *raise* spl.
mips's splsoftclock() seems to be wrong.

Am I missing something ?
--
soda