In article <20000716102838.H714@dr-evil.z.zembu.com>,
	Jason R Thorpe <thorpej@zembu.com> writes:
> > +			reg |= PCI_COMMAND_IO_ENABLE |
> > +			       PCI_COMMAND_MEM_ENABLE |
> > +			       PCI_COMMAND_MASTER_ENABLE;
> 
> This is not correct.  MASTER should be enabled, but each of IO and MEM
> should be enabled iff its corresponding BAR has a valid value programmed
> into it, and if pa->pa_flags has the corresponding flag set.

Well, that is exactly the reason why the card is not working after being
in power state D3: IO and MEM are disabled. To make it up it must be
enabled. And writing to PCI_COMMAND_STATUS_REG seems to do that.

> > +			pa->pa_flags |= PCI_FLAGS_IO_ENABLED |
> > +					PCI_FLAGS_MEM_ENABLED;
> 
> You should *never* modify pa->pa_flags;

What should be done else? Somehow the system must be told that IO
and MEM have been enabled.

	Kind regards

-- 
Matthias Scheler                            http://www.sighardstrasse.de/~tron/