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On Mon, Nov 13, 2000 at 03:03:11PM +0000, Ben Harris wrote:
> In article <20001113141304.D19591FF85@thoreau.thistledown.com.au> you wri=
te:
> >Also, there are lots of places where I've made assumptions about what is
> >a valid ISA for a given architecture.  These should be checked by people
> >familiar with those architectures.  The only ones I'm confident with are
> >mips, alpha, m68k, ns32k and perhaps sparc.  Here's a list of the ISA's:
> >
> >	alpha	ev{4,5,56,6,67}
> >	arm26	arm2
> >	arm32	arm{2,3,4}
>=20
> These should be armv2 etc (arm2 usually refers to a specific CPU).  I
> suspect that following GCC would be wise, which gcc.info claims gives:
>=20
> 	arm26	armv{2,2a}
> 	arm32	armv{3,3m,4,4t}
>=20
> >So, anyone disagree with this whole idea or have any suggestions of
> >improvements?
>=20
> Question:  If the kernel emulates the instructions provided by later ISAs,
> what should it report?

Hopefully the real values. At least on m68k, you want to know wether the
instructions would be emulated via a kernel trap, if you care at all.

Besides: on m68k you alsow want to know what type of FPU is installed:

{none,6888[12],68040,68060,and ask the sun3 specialists about their options}

Regards,
	-is

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Content-Type: application/pgp-signature
Content-Disposition: inline

-----BEGIN PGP SIGNATURE-----
Version: 2.6.i

iQEVAgUBOhAEhTCn4om+4LhpAQGySQf+Nt3YIp2TU8Giue2b3YT5NeZ0swacsGAA
4K3UHU1nXjQbqFJ2C+EEPixGWPekETw4kXrIjbj0OG5A+qvIUP3oCqLzqhdccpCy
CJLaQg3sB55IGqJCxvV4sUmCoAzhlH2X/if3hkuQ6IIPs9PLOLdihQlWUY45OMJs
BfmZMdQ6mi+2K2XhBPmyLvhmEwoAKla5w0UxIJ+EpGVOCQaSDRXxt9P6cEQapJSQ
4bZwZ4yh8hCJU6HBtzZun4jTseP0Yl+H+aSN3BY84M3V8TopoDlQ0QMS6tNCKeWg
KB5jDuehU28yNyS0cuFwxEkMcSdmihRQXv205BlLB8nFOt35F1FcGQ==
=Q8iH
-----END PGP SIGNATURE-----

--nmemrqcdn5VTmUEE--