Subject: Re: new sysctl: hw.cpu_isa
To: Simon Burge <simonb@wasabisystems.com>
From: Artur Grabowski <art@stacken.kth.se>
List: tech-kern
Date: 11/19/2000 00:59:09
Simon Burge <simonb@wasabisystems.com> writes:
> Also, there are lots of places where I've made assumptions about what is
> a valid ISA for a given architecture. These should be checked by people
> familiar with those architectures. The only ones I'm confident with are
> mips, alpha, m68k, ns32k and perhaps sparc. Here's a list of the ISA's:
>
> alpha ev{4,5,56,6,67}
> arm26 arm2
> arm32 arm{2,3,4}
> i386 {3,4,5,6}86
> m68k 680{2,3,4,6}0
> mips mips{1,2,3,4,5,32,64}
> ns32k ns32532 +
> ppc 60{1,2,3,3e,3e+,4,4e},620,750,7400 *
> sh3 sh3 +
> sparc sun4{,c,m,u}
I don't think that this is how you want to do sparc. You might want to do
this kind of optimization to get the good mul and div instructions from
v8 cpus. And sun4m _doesn't_ mean v8. I have at least one sun4m cpu that
is v7.
I would suggest v7, v8, v9 for sparc.
//art