On Sun, Feb 25, 2001 at 01:30:01AM +0200, Matthew Jacob wrote:

 > Log Message:
 > Now that the underlying code for bus_dmamap_sync appears to do the
 > right thing, don't use the illegal and "just worked by chance" addition
 > of BUS_DMA_COHERENT to bus_dmamap_load_raw. There still is a necessity
 > to add to the architecture to allow one to hint that this should be
 > a cache coherent mapping.

There is -- when you call bus_dmamem_map().  But, it's only a hint
(because on some systems, you *can't* make things cache coherent).

When you bus_dmamap_load() memory that's mapped with COHERENT, the
machdep code could notice that it's loading coherently-mapped memory,
which could store a flag in the machdep part of the dmamap, which could
then be tested in bus_dmamap_sync().

-- 
        -- Jason R. Thorpe <thorpej@zembu.com>