Martin Husemann wrote:
> 
> > On the PC architecture, ISA bus devices only decode the bottom
> > 10 bits of the IO address space.
> 
> Sorry, this simply is not true.
> 
> For a counter example see the "USR ISDN Sportster TA intern" cards, driven by
> sys/dev/isa/isic_isa_usr_sti.c. I have such a card and it definitively works.
> It uses the following offsetts
> 
> #define USR_HSCXA_OFF   0x0000
> #define USR_HSCXB_OFF   0x4000
> #define USR_INTL_OFF    0x8000
> #define USR_ISAC_OFF    0xc000
> 
> from it's base IO port for different chips (or parts of chips) on the card.
> 
> Martin

Actually I'll use your counter example as an indication that it IS true
:-)

All 16 IO address lines are present - so CAN be decoded, but only 10 are
usually decoded.  However space between 0x200 and 0x3ff is rather
limited. Card that require additonal IO space quite often decode the
high address bits in order to select differnt parts of the card. (I've
seen another one).

Now, when you declare the IO space that your ISDN card uses, you should
only specify the bottom part (or rather the larger part).  As far as IO
address allocation goes the four address blocks of your card are a singe
entity.

The fact that the top 6 bits are (usually) ignored by ISA cards is why
you card actually uses some of thoe high bits interally.

	David