Subject: kern/19435, kern/19919 and BUS_DMA_NOCACHE
To: None <tech-kern@netbsd.org>
From: TAMURA Kent <kent@netbsd.org>
List: tech-kern
Date: 01/23/2003 12:44:53
In message "Re: kern/19435 and uncached memory"
on 03/01/17, Frank van der Linden <fvdl@wasabisystems.com> writes:
> > A workaround described in [1] is to disable cache of buffers.
> > Do we have a standard way to allocate uncached memory on NetBSD?
>
> If we're talking about DMA buffers, what would be needed is a new
> flag to the bus_dma(9) interfaces, BUS_DMA_NOCACHE. It's trivial
> to implement on i386, I don't know about other platforms. If
> specified as a hint (i.e. a platform may ignore the flag),
> it's easy to add.
Dhoyashiki-san posted BUS_DMA_NOCACHE patch to solve the problem
in kern/19919. I revised the patch so that all platforms had
BUS_DMA_NOCACHE and the bus_dma manpage had the description for
it.
Comments? I'll commit the following on the weekend If no objections.
--
TAMURA Kent <kent2003@hauN.org> <kent@netbsd.org>
Index: share/man/man9/bus_dma.9
===================================================================
RCS file: /cvsroot/src/share/man/man9/bus_dma.9,v
retrieving revision 1.25
diff -u -r1.25 bus_dma.9
--- share/man/man9/bus_dma.9 2002/10/14 13:43:16 1.25
+++ share/man/man9/bus_dma.9 2003/01/23 03:40:21
@@ -677,6 +677,11 @@
See the description of the
.Fn bus_dmamap_load
function.
+.It Dv BUS_DMA_NOCACHE
+This flag is a
+.Em hint
+to machine-dependent code.
+If possible, map the unchached memory.
.El
.El
.Pp
Index: sys/dev/pci/auich.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/auich.c,v
retrieving revision 1.33
diff -u -r1.33 auich.c
--- sys/dev/pci/auich.c 2003/01/21 16:05:21 1.33
+++ sys/dev/pci/auich.c 2003/01/23 03:40:21
@@ -211,6 +211,8 @@
/* SiS 7012 hack */
int sc_sample_size;
int sc_sts_reg;
+ /* 440MX workaround */
+ int sc_dmamap_flags;
void (*sc_pintr)(void *);
void *sc_parg;
@@ -446,7 +448,13 @@
&& d->product == PCI_PRODUCT_NVIDIA_NFORCE_MCP_AC) {
sc->sc_ignore_codecready = TRUE;
}
-
+ /* Workaround for a 440MX B-stepping erratum */
+ sc->sc_dmamap_flags = BUS_DMA_COHERENT;
+ if (d->vendor == PCI_VENDOR_INTEL
+ && d->product == PCI_PRODUCT_INTEL_82440MX_ACA) {
+ sc->sc_dmamap_flags |= BUS_DMA_NOCACHE;
+ printf("%s: DMA bug workaround enabled\n", sc->sc_dev.dv_xname);
+ }
/* Set up DMA lists. */
sc->ptr_pcmo = sc->ptr_pcmi = sc->ptr_mici = 0;
@@ -1230,7 +1238,7 @@
return (error);
error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size,
- &p->addr, BUS_DMA_NOWAIT|BUS_DMA_COHERENT);
+ &p->addr, BUS_DMA_NOWAIT|sc->sc_dmamap_flags);
if (error)
goto free;
@@ -1286,7 +1294,7 @@
if ((error = bus_dmamem_map(sc->dmat, &seg, rseg,
sizeof(struct auich_cdata),
(caddr_t *) &sc->sc_cdata,
- BUS_DMA_COHERENT)) != 0) {
+ sc->sc_dmamap_flags)) != 0) {
printf("%s: unable to map control data, error = %d\n",
sc->sc_dev.dv_xname, error);
goto fail_1;
Index: sys/arch/i386/i386/bus_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/i386/i386/bus_machdep.c,v
retrieving revision 1.17
diff -u -r1.17 bus_machdep.c
--- sys/arch/i386/i386/bus_machdep.c 2002/10/01 12:56:48 1.17
+++ sys/arch/i386/i386/bus_machdep.c 2003/01/23 03:40:21
@@ -809,8 +809,15 @@
vaddr_t va;
bus_addr_t addr;
int curseg;
-
+ int32_t cpumask;
+ int nocache;
+ int marked;
+ pt_entry_t *pte;
+
size = round_page(size);
+ cpumask = 0;
+ nocache = (flags & BUS_DMA_NOCACHE) != 0 && cpu_class != CPUCLASS_386;
+ marked = 0;
va = uvm_km_valloc(kernel_map, size);
@@ -828,8 +835,22 @@
pmap_enter(pmap_kernel(), va, addr,
VM_PROT_READ | VM_PROT_WRITE,
PMAP_WIRED | VM_PROT_READ | VM_PROT_WRITE);
+ /*
+ * mark page as non-cacheable
+ */
+ if (nocache) {
+ pte = kvtopte(va);
+ if ((*pte & PG_N) == 0) {
+ *pte |= PG_N;
+ pmap_tlb_shootdown(pmap_kernel(), va,
+ *pte, &cpumask);
+ marked = 1;
+ }
+ }
}
}
+ if (marked)
+ pmap_tlb_shootnow(cpumask);
pmap_update(pmap_kernel());
return (0);
Index: sys/arch/algor/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/algor/include/bus.h,v
retrieving revision 1.6
diff -u -r1.6 bus.h
--- sys/arch/algor/include/bus.h 2002/03/17 21:45:06 1.6
+++ sys/arch/algor/include/bus.h 2003/01/23 03:40:22
@@ -507,6 +507,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
/*
* Private flags stored in the DMA map.
Index: sys/arch/alpha/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/alpha/include/bus.h,v
retrieving revision 1.47
diff -u -r1.47 bus.h
--- sys/arch/alpha/include/bus.h 2002/04/26 04:15:19 1.47
+++ sys/arch/alpha/include/bus.h 2003/01/23 03:40:22
@@ -511,6 +511,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
/*
* Private flags stored in the DMA map.
Index: sys/arch/arc/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arc/include/bus.h,v
retrieving revision 1.14
diff -u -r1.14 bus.h
--- sys/arch/arc/include/bus.h 2002/03/17 21:45:06 1.14
+++ sys/arch/arc/include/bus.h 2003/01/23 03:40:22
@@ -692,6 +692,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
#define ARC_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */
Index: sys/arch/arm/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/bus.h,v
retrieving revision 1.8
diff -u -r1.8 bus.h
--- sys/arch/arm/include/bus.h 2002/08/17 20:46:27 1.8
+++ sys/arch/arm/include/bus.h 2003/01/23 03:40:22
@@ -633,6 +633,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
/*
* Private flags stored in the DMA map.
Index: sys/arch/atari/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/atari/include/bus.h,v
retrieving revision 1.28
diff -u -r1.28 bus.h
--- sys/arch/atari/include/bus.h 2002/01/07 07:17:17 1.28
+++ sys/arch/atari/include/bus.h 2003/01/23 03:40:22
@@ -557,6 +557,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
/* Forwards needed by prototypes below. */
struct mbuf;
Index: sys/arch/cobalt/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/cobalt/include/bus.h,v
retrieving revision 1.8
diff -u -r1.8 bus.h
--- sys/arch/cobalt/include/bus.h 2002/03/17 21:45:07 1.8
+++ sys/arch/cobalt/include/bus.h 2003/01/23 03:40:22
@@ -486,6 +486,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
#define COBALT_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */
Index: sys/arch/dreamcast/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/dreamcast/include/bus.h,v
retrieving revision 1.6
diff -u -r1.6 bus.h
--- sys/arch/dreamcast/include/bus.h 2002/03/25 18:59:40 1.6
+++ sys/arch/dreamcast/include/bus.h 2003/01/23 03:40:22
@@ -464,6 +464,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
/* Forwards needed by prototypes below. */
struct mbuf;
Index: sys/arch/hp700/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/hp700/include/bus.h,v
retrieving revision 1.3
diff -u -r1.3 bus.h
--- sys/arch/hp700/include/bus.h 2002/08/25 20:20:01 1.3
+++ sys/arch/hp700/include/bus.h 2003/01/23 03:40:22
@@ -312,6 +312,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
/* For devices that have a 24-bit address space */
#define BUS_DMA_24BIT BUS_DMA_BUS1
Index: sys/arch/hpcmips/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/hpcmips/include/bus.h,v
retrieving revision 1.15
diff -u -r1.15 bus.h
--- sys/arch/hpcmips/include/bus.h 2002/04/14 07:59:59 1.15
+++ sys/arch/hpcmips/include/bus.h 2003/01/23 03:40:23
@@ -931,6 +931,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
/*
* Operations performed by bus_dmamap_sync().
Index: sys/arch/hpcsh/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/hpcsh/include/bus.h,v
retrieving revision 1.7
diff -u -r1.7 bus.h
--- sys/arch/hpcsh/include/bus.h 2002/03/17 21:45:07 1.7
+++ sys/arch/hpcsh/include/bus.h 2003/01/23 03:40:23
@@ -604,6 +604,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
/*
* Private flags stored in the DMA map.
Index: sys/arch/i386/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/i386/include/bus.h,v
retrieving revision 1.39
diff -u -r1.39 bus.h
--- sys/arch/i386/include/bus.h 2002/10/01 12:57:03 1.39
+++ sys/arch/i386/include/bus.h 2003/01/23 03:40:23
@@ -1027,6 +1027,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
/* Forwards needed by prototypes below. */
struct mbuf;
Index: sys/arch/m68k/include/bus_dma.h
===================================================================
RCS file: /cvsroot/src/sys/arch/m68k/include/bus_dma.h,v
retrieving revision 1.1
diff -u -r1.1 bus_dma.h
--- sys/arch/m68k/include/bus_dma.h 2002/04/10 04:36:20 1.1
+++ sys/arch/m68k/include/bus_dma.h 2003/01/23 03:40:23
@@ -93,6 +93,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
/* Forwards needed by prototypes below. */
struct mbuf;
Index: sys/arch/macppc/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/macppc/include/bus.h,v
retrieving revision 1.14
diff -u -r1.14 bus.h
--- sys/arch/macppc/include/bus.h 2001/07/19 15:32:14 1.14
+++ sys/arch/macppc/include/bus.h 2003/01/23 03:40:23
@@ -762,6 +762,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
/* Forwards needed by prototypes below. */
struct mbuf;
Index: sys/arch/mips/include/bus_dma.h
===================================================================
RCS file: /cvsroot/src/sys/arch/mips/include/bus_dma.h,v
retrieving revision 1.2
diff -u -r1.2 bus_dma.h
--- sys/arch/mips/include/bus_dma.h 2002/03/18 01:01:54 1.2
+++ sys/arch/mips/include/bus_dma.h 2003/01/23 03:40:23
@@ -88,6 +88,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
/*
* Private flags stored in the DMA map.
Index: sys/arch/mipsco/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/mipsco/include/bus.h,v
retrieving revision 1.9
diff -u -r1.9 bus.h
--- sys/arch/mipsco/include/bus.h 2002/03/17 21:45:08 1.9
+++ sys/arch/mipsco/include/bus.h 2003/01/23 03:40:24
@@ -784,6 +784,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
#define MIPSCO_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */
Index: sys/arch/mvme68k/include/bus_dma.h
===================================================================
RCS file: /cvsroot/src/sys/arch/mvme68k/include/bus_dma.h,v
retrieving revision 1.10
diff -u -r1.10 bus_dma.h
--- sys/arch/mvme68k/include/bus_dma.h 2002/02/12 20:38:35 1.10
+++ sys/arch/mvme68k/include/bus_dma.h 2003/01/23 03:40:24
@@ -91,6 +91,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
/*
* Flags to constrain the physical memory allocated for DMA
Index: sys/arch/newsmips/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/newsmips/include/bus.h,v
retrieving revision 1.6
diff -u -r1.6 bus.h
--- sys/arch/newsmips/include/bus.h 2002/03/17 21:45:08 1.6
+++ sys/arch/newsmips/include/bus.h 2003/01/23 03:40:24
@@ -486,6 +486,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
#define NEWSMIPS_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */
#define NEWSMIPS_DMAMAP_MAPTBL 0x20000 /* use DMA maping table */
Index: sys/arch/ofppc/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/ofppc/include/bus.h,v
retrieving revision 1.2
diff -u -r1.2 bus.h
--- sys/arch/ofppc/include/bus.h 2002/09/16 02:12:30 1.2
+++ sys/arch/ofppc/include/bus.h 2003/01/23 03:40:24
@@ -506,6 +506,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
/* Forwards needed by prototypes below. */
struct mbuf;
Index: sys/arch/playstation2/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/playstation2/include/bus.h,v
retrieving revision 1.3
diff -u -r1.3 bus.h
--- sys/arch/playstation2/include/bus.h 2002/08/14 17:02:07 1.3
+++ sys/arch/playstation2/include/bus.h 2003/01/23 03:40:24
@@ -736,6 +736,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
#define PLAYSTATION2_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */
Index: sys/arch/pmax/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/pmax/include/bus.h,v
retrieving revision 1.17
diff -u -r1.17 bus.h
--- sys/arch/pmax/include/bus.h 2002/03/17 21:45:08 1.17
+++ sys/arch/pmax/include/bus.h 2003/01/23 03:40:24
@@ -499,6 +499,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
#define PMAX_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */
Index: sys/arch/powerpc/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/powerpc/include/bus.h,v
retrieving revision 1.4
diff -u -r1.4 bus.h
--- sys/arch/powerpc/include/bus.h 2002/05/31 11:31:30 1.4
+++ sys/arch/powerpc/include/bus.h 2003/01/23 03:40:24
@@ -994,6 +994,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
/* Forwards needed by prototypes below. */
struct mbuf;
Index: sys/arch/sgimips/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/sgimips/include/bus.h,v
retrieving revision 1.6
diff -u -r1.6 bus.h
--- sys/arch/sgimips/include/bus.h 2002/12/23 20:41:47 1.6
+++ sys/arch/sgimips/include/bus.h 2003/01/23 03:40:24
@@ -488,6 +488,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
#define SGIMIPS_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */
Index: sys/arch/sh5/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/sh5/include/bus.h,v
retrieving revision 1.3
diff -u -r1.3 bus.h
--- sys/arch/sh5/include/bus.h 2002/10/01 07:55:17 1.3
+++ sys/arch/sh5/include/bus.h 2003/01/23 03:40:24
@@ -874,6 +874,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
/* Forwards needed by prototypes below. */
struct mbuf;
Index: sys/arch/sparc/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc/include/bus.h,v
retrieving revision 1.37
diff -u -r1.37 bus.h
--- sys/arch/sparc/include/bus.h 2003/01/03 13:23:39 1.37
+++ sys/arch/sparc/include/bus.h 2003/01/23 03:40:24
@@ -1283,6 +1283,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
/* For devices that have a 24-bit address space */
#define BUS_DMA_24BIT BUS_DMA_BUS1
Index: sys/arch/sparc64/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc64/include/bus.h,v
retrieving revision 1.41
diff -u -r1.41 bus.h
--- sys/arch/sparc64/include/bus.h 2002/12/10 13:44:52 1.41
+++ sys/arch/sparc64/include/bus.h 2003/01/23 03:40:24
@@ -1386,6 +1386,7 @@
#define BUS_DMA_STREAMING 0x100 /* hint: sequential, unidirectional */
#define BUS_DMA_READ 0x200 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x400 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x800 /* hint: map non-cached memory */
#define BUS_DMA_NOCACHE BUS_DMA_BUS1
Index: sys/arch/sun68k/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/sun68k/include/bus.h,v
retrieving revision 1.3
diff -u -r1.3 bus.h
--- sys/arch/sun68k/include/bus.h 2001/11/30 16:04:25 1.3
+++ sys/arch/sun68k/include/bus.h 2003/01/23 03:40:25
@@ -1021,6 +1021,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
/* For devices that have a 24-bit address space */
#define BUS_DMA_24BIT BUS_DMA_BUS1
Index: sys/arch/vax/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/vax/include/bus.h,v
retrieving revision 1.20
diff -u -r1.20 bus.h
--- sys/arch/vax/include/bus.h 2002/12/01 21:21:44 1.20
+++ sys/arch/vax/include/bus.h 2003/01/23 03:40:25
@@ -878,6 +878,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
#define VAX_BUS_DMA_SPILLPAGE BUS_DMA_BUS1 /* VS4000 kludge */
/*
Index: sys/arch/x68k/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/x68k/include/bus.h,v
retrieving revision 1.9
diff -u -r1.9 bus.h
--- sys/arch/x68k/include/bus.h 2001/11/11 01:38:00 1.9
+++ sys/arch/x68k/include/bus.h 2003/01/23 03:40:25
@@ -912,6 +912,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
/*
* Operations performed by bus_dmamap_sync().
Index: sys/arch/x86_64/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/x86_64/include/bus.h,v
retrieving revision 1.4
diff -u -r1.4 bus.h
--- sys/arch/x86_64/include/bus.h 2002/01/25 22:01:42 1.4
+++ sys/arch/x86_64/include/bus.h 2003/01/23 03:40:25
@@ -1067,6 +1067,7 @@
#define BUS_DMA_BUS4 0x080
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
+#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
/* Forwards needed by prototypes below. */
struct mbuf;