Hello,

after looking into the Pentium 4 event counting a little and comparing against 
the ones for Pentium{,Pro, II, III} and AMD K7s (Athlon):
  - the non-Pentium 4s provide a number of counters (2 or 4), where each
     counter has  ( a part of a ) control register to select the event,
      event subtype, inverse, edge, etc parameters
  - the Pentium4 has 18 counters, 18 counter control registers (ECCRs) and 45
     event source registers (ESCRs)
     events are selected by setting the event type/subtype in a ESCR, where not
     every ESCR can count every event: they are grouped..
     Then in an ECCR for a counter, the ESCR is set as source, inverse, edge,
      etc as attributes.

Unfortunately, on i386, the interface is via the i386_pmc_{info,startstop,read} 
syscalls.  The argument passed to i386_pmc_startstop to (surprise) start/stop a 
counter is a struct i386_pmc_startstop_args with
  int       counter;   /* # counter  */
  u_int64_t val;       /* of counter */
  u_int8_t  event;
  u_int8_t  unit;      /* event/subevent */
  u_int8_t  compare;   /* threshold for counting */
  u_int8_t  flags;     /* USER, KERNEL, EDGE, etc */

So there seems to be no space left for specifying the ESCR#, which would be 
needed for Pentium 4.

To solve this, there are three possibilities (at least:-)
  1) misuse space in the 64bit `val' member for ESCR#, which has only 40bit used
     in reality
  2) The Pentium 4 system programming manual defines around 30 event types
      in total (plus subtypes)
     Define a map in the pmc system code that maps the 30 event numbers to
      the necessary ESCR, ECCR settings.  Which would be a little bit cumbersome
      as more bookkeeping about HW counters in use must be kept.
  3) Add a new member to the i386_pmc_startstop syscall arg...


Any opinions?

BTW: should we move this to port-i386?

Best regards....
 	Stephan

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