On Mar 8, 2006, at 3:59 PM, Garrett D'Amore wrote:

> Jason Thorpe wrote:
>>
>> On Mar 8, 2006, at 1:47 PM, Garrett D'Amore wrote:
>>
>>> Steve Woodford wrote:
>>> Yes, I have such hardware.  But on my platform its a feature of  
>>> the bus
>>> I'm on, and not a device specific thing.  (So I naturally take  
>>> care of
>>> it in the parent bus.)  The problem is when the actual *chip* has  
>>> weird
>>> things about it that you try to solve at the bus level...
>>
>> I think a combination of things are necessary...
>>
>> 1- Adjusted bus_space tags for the access-width / stride issue
>>
>> 2- A register offset map for the "registers are laid out differently"
>> issue.
>>
>>> Oooh.... I like that idea.
>>
>> I don't... a single indirect function call is bad enough :-)
> How does an indirect function call compare against say the cost of
> another array index lookup and an extra shift/mask operation>

for vax, about an order of magnitude.

> Also, folks seem *really* concerned about the performance of these
> things.  Are folks really wanting to drive *non-FIFO* older parts at
> 115200+?    For newer parts it shouldn't matter that much.

Not every platform is N hundred MHz CPU.

> FWIW, this is like 14k extra indirect calls per second.

That's a lot.

> I'm also willing to consider that for low performance systems we  
> use an
> #ifdef that makes the call not go thru the extra indirection.

Then why bother with the extra indirection?

> Its not as if these are really high data rate parts... :-)

They might seem to be for some platforms!