On Thu, Apr 13, 2006 at 01:22:12PM -0700, Tom Spindler wrote:
> [That was my myself: ]
> > Another possibility is too fast access to memory. To be precise:
> > when a cpu cache burst is back to back with DMA access from/to the
> > disk controler, the timing between the two is too "tight". 
> 
> This would jibe with some bizarre corruption we noticed about two
> years ago in a ppc development board - it mysteriously stopped when
> the caches were disabled.

Let me add that the error occurs at the page boundary because that's where
disk DMA usually starts...

Regards,
	-is
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