Subject: Re: RFC: est.c driver synced with OpenBSD.
To: Juan RP <juan@xtrarom.org>
From: Greg Troxel <gdt@ir.bbn.com>
List: tech-kern
Date: 09/05/2006 08:42:15
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Good news, Simon made a patch that will create a fake table with all valu=
es
(not only highest and lowest) using an algorithm:
http://www.xtrarom.org/~juan/juan-est-plus-fake-table.diff
I tried it on my Pentium M 745 1800MHz and it did show 13 frequencies.
The known table for this CPU only has 6 freqs, so I thought the algorithm
wasn't working correctly, but I think it's working fine because openssl
speed seems to ok.
I think we should be conservative about these things and only use
values in the datasheets, at least by default.
I didn't see a note here, but I noticed that you committed most of
this and I've built and booted it on a Thinkpad T60 with a Core Duo.
I have one processor turned off in the BIOS; I had some bluetooth
trouble and haven't tracked it down but was suspicious of MP issues.
cpu0 at mainbus0: apid 0 (boot processor)
cpu0: Intel Pentium M (Yonah) (686-class), 2161.41 MHz, id 0x6e8
cpu0: features afe9fbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR>
cpu0: features afe9fbff<PGE,MCA,CMOV,PAT,CFLUSH,DS,ACPI,MMX>
cpu0: features afe9fbff<FXSR,SSE,SSE2,SS,TM,SBF>
cpu0: features2 c1a9<SSE3,MONITOR,VMX,EST,TM2,xTPR>
cpu0: "Genuine Intel(R) CPU T2600 @ 2.16GHz"
cpu0: I-cache 32 KB 64B/line 8-way, D-cache 32 KB 64B/line 8-way
cpu0: L2 cache 2 MB 64B/line 8-way
cpu0: using thermal monitor 1
cpu0: Enhanced SpeedStep (1404 mV) 2167 MHz
cpu0: unknown Enhanced SpeedStep CPU.
cpu0: using only highest and lowest power states.
cpu0: Enhanced SpeedStep frequencies available (MHz): 2167 1000
cpu0: calibrating local timer
cpu0: apic clock running at 166 MHz
cpu0: 64 page colors
At 2167 and then 1000:
sha1 11551.87k 35392.24k 84868.39k 130443.29k 154819.=
94k
well, setting to 1000 didn't go so well... (new keyboard, later):
supervisor trap page fault, code=3D0
est_sysctl_helper+0x17f: movzbl 0x1(%esi, %eax, 1), %ecx
=2D-=20
Greg Troxel <gdt@ir.bbn.com>
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