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Re: Interrupt problems on NetBSD/i386 5.0.1
2010/1/5 Ingolf Steinbach <ingolf.steinbach%googlemail.com@localhost>:
> since my box had been upgraded from 3.0.1 to 5.0.1, there
> seem to be problems related to interrupt handling.
[...]
I'd very much like to find a solution for these problems (either by
helping find and fix a bug in one of the associated drivers or by
being able to definitively attribute them to broken hardware).
However, I have no idea as to where to look next.
Attached to this e-mail are two dmesg dumps generated by a custom
kernel (netbsd-5-0 branch) with many debugging features turned on: One
with wd1 (device 0 on channel 1 of the VIA IDE controller) enabled and
the second one with wd1 disabled (via BIOS menu).
As stated before, in the second case I keep receiving
viaide0:1:0: lost interrupt
type: atapi tc_bcount: 1028 tc_skip: 1024
messages when trying to play any video DVD from cd0.
One difference between the two dmesg dumps is that in first one, three
cd0 related messages appear in direct sequence (lines 1360-1362),
while in the second one, the first of these three cd0 related messages
is already in line 1345. What is the reason that cd0 configuration
seems to be interrupted by uhub0 and uhub1? Can this be the reason for
the lost interrupts?
Kind regards
Ingolf
Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
2006, 2007, 2008, 2009
The NetBSD Foundation, Inc. All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
The Regents of the University of California. All rights reserved.
NetBSD 5.0.1_PATCH (HELIOS-$Revision: 1.20 $) #1: Thu Feb 4 21:08:43 CET 2010
ingolf%helios.steinba.ch@localhost:/usr/obj/sys/arch/i386/compile/HELIOS
total memory = 255 MB
avail memory = 245 MB
timecounter: Timecounters tick every 10.000 msec
timecounter: Timecounter "i8254" frequency 1193182 Hz quality 100
VIA Technologies, Inc. VT8363x ( )
PCI BIOS rev. 2.1 found at 0xfb380
pcibios: config mechanism [1][x], special cycles [1][x], last bus 1
PCI IRQ Routing Table rev. 1.0 found at 0xfdd00, size 176 bytes (9 entries)
PCI Interrupt Router at 000:07:0 (VIA Technologies VT82C596A PCI-ISA Bridge
compatible)
PCI Exclusive IRQs: 5 9 10 11
PIR Entry 0:
Bus: 0 Device: 8
INTA: link 0x01 bitmap 0xdeb8
INTB: link 0x02 bitmap 0xdeb8
INTC: link 0x03 bitmap 0xdeb8
INTD: link 0x05 bitmap 0xdeb8
PIR Entry 1:
Bus: 0 Device: 9
INTA: link 0x02 bitmap 0xdeb8
INTB: link 0x03 bitmap 0xdeb8
INTC: link 0x05 bitmap 0xdeb8
INTD: link 0x01 bitmap 0xdeb8
PIR Entry 2:
Bus: 0 Device: 10
INTA: link 0x03 bitmap 0xdeb8
INTB: link 0x05 bitmap 0xdeb8
INTC: link 0x01 bitmap 0xdeb8
INTD: link 0x02 bitmap 0xdeb8
PIR Entry 3:
Bus: 0 Device: 11
INTA: link 0x05 bitmap 0xdeb8
INTB: link 0x01 bitmap 0xdeb8
INTC: link 0x02 bitmap 0xdeb8
INTD: link 0x03 bitmap 0xdeb8
PIR Entry 4:
Bus: 0 Device: 12
INTA: link 0x01 bitmap 0xdeb8
INTB: link 0x02 bitmap 0xdeb8
INTC: link 0x03 bitmap 0xdeb8
INTD: link 0x05 bitmap 0xdeb8
PIR Entry 5:
Bus: 0 Device: 13
INTA: link 0x03 bitmap 0xdeb8
INTB: link 0x05 bitmap 0xdeb8
INTC: link 0x01 bitmap 0xdeb8
INTD: link 0x02 bitmap 0xdeb8
PIR Entry 6:
Bus: 0 Device: 14
INTA: link 0x02 bitmap 0xdeb8
INTB: link 0x03 bitmap 0xdeb8
INTC: link 0x05 bitmap 0xdeb8
INTD: link 0x01 bitmap 0xdeb8
PIR Entry 7:
Bus: 0 Device: 1
INTA: link 0x01 bitmap 0xdeb8
INTB: link 0x02 bitmap 0xdeb8
INTC: link 0x03 bitmap 0xdeb8
INTD: link 0x05 bitmap 0xdeb8
PIR Entry 8:
Bus: 0 Device: 7
INTA: link 0x00 bitmap 0xdeb8
INTB: link 0x00 bitmap 0xdeb8
INTC: link 0x03 bitmap 0xdeb8
INTD: link 0x05 bitmap 0xdeb8
pciintr_link_fixup: PIRQ 0x00 already connected to IRQ 9
pciintr_link_fixup: PIRQ 0x01 already connected to IRQ 10
pciintr_link_fixup: PIRQ 0x02 already connected to IRQ 11
pciintr_link_fixup: PIRQ 0x04 already connected to IRQ 10
pciintr_link_route: route of PIRQ 0x00 -> IRQ 9 preserved BIOS setting
pciintr_link_route: route of PIRQ 0x01 -> IRQ 10 preserved BIOS setting
pciintr_link_route: route of PIRQ 0x02 -> IRQ 11 preserved BIOS setting
pciintr_link_route: route of PIRQ 0x04 -> IRQ 10 preserved BIOS setting
------------------------------------------
device vendor product pin PIRQ IRQ stage
------------------------------------------
000:07:2 0x1106 0x3038 D 0x04 10 0 WARNING: preserving irq 11
000:07:3 0x1106 0x3038 D 0x04 10 0 WARNING: preserving irq 11
000:07:5 0x1106 0x3058 C 0x02 11 0 WARNING: preserving irq 9
000:09:0 0x10ec 0x8139 A 0x01 10 0 already assigned
000:11:0 0x1095 0x3512 A 0x04 10 0 WARNING: preserving irq 11
------------------------------------------
pciintr_irq_release: fixup pciirq level/edge map 0x0e00
pciintr_irq_release: bios pciirq level/edge map 0x0e20
pciintr_irq_release: final pciirq level/edge map 0x0e20
mainbus0 (root)
cpu0 at mainbus0: AMD 686-class, 797MHz, id 0x631
acpi0 at mainbus0: Intel ACPICA 20080321
acpi0: X/RSDT: OemId <BIOSTA,AWRDACPI,42302e31>, AslId <AWRD,00000000>
LNKB: ACPI: Found matching pin for 0.9.INTA at func 0: 10
LNKD: ACPI: Found matching pin for 0.11.INTA at func 0: 11
LNKC: ACPI: Found matching pin for 0.7.INTC at func 5: 9
LNKC: BIOS IRQ 9 for 0.7.INTC is invalid
LNKD: ACPI: Found matching pin for 0.7.INTD at func 2: 11
acpi0: SCI interrupting at int 11
acpi0: fixed-feature power button present
timecounter: Timecounter "ACPI-Fast" frequency 3579545 Hz quality 1000
ACPI-Fast 24-bit timer
acpibut0 at acpi0 (PWRB, PNP0C0C): ACPI Power Button
acpibut1 at acpi0 (SLPB, PNP0C0E): ACPI Sleep Button
attimer0 at acpi0 (TMR, PNP0100): AT Timer
attimer0: io 0x40-0x43 irq 0
pcppi0 at acpi0 (SPKR, PNP0800)
pcppi0: io 0x61
midi0 at pcppi0: PC speaker (CPU-intensive output)
sysbeep0 at pcppi0
npx1 at acpi0 (COPR, PNP0C04)
npx1: io 0xf0-0xff irq 13
npx1: reported by CPUID; using exception 16
FDC0 (PNP0700) [PC standard floppy disk controller] at acpi0 not configured
UAR1 (PNP0501) [16550A-compatible COM port] at acpi0 not configured
UAR2 (PNP0501) [16550A-compatible COM port] at acpi0 not configured
LPT1 (PNP0400) [Standard LPT printer port] at acpi0 not configured
pckbc0 at acpi0 (PS2M, PNP0F13): aux port
pckbc0: irq 12
pckbc1 at acpi0 (PS2K, PNP0303): kbd port
pckbc1: io 0x60,0x64 irq 1
apm0 at acpi0: Power Management spec V1.2
attimer0: attached to pcppi0
pckbd0 at pckbc1 (kbd slot)
pckbc1: using irq 1 for kbd slot
wskbd0 at pckbd0: console keyboard
pms0 at pckbc1 (aux slot)
pckbc1: using irq 12 for aux slot
wsmouse0 at pms0 mux 0
pci0 at mainbus0 bus 0: configuration mode 1
pci0: i/o space, memory space enabled, rd/line, rd/mult, wr/inv ok
pchb0 at pci0 dev 0 function 0: PCI configuration registers:
Common header:
0x00: 0x03051106 0x22100006 0x06000003 0x00000000
Vendor Name: VIA Technologies (0x1106)
Device Name: VT8363 (Apollo KT133) Host Bridge (0x0305)
Command register: 0x0006
I/O space accesses: off
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x2210
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: on
Asserted System Error (SERR): off
Parity error detected: off
Class Name: bridge (0x06)
Subclass Name: host (0x00)
Interface: 0x00
Revision ID: 0x03
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x00
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0xd0000008 0x00000000 0x00000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x00000000
0x30: 0x00000000 0x000000a0 0x00000000 0x00000000
Base address register at 0x10
type: 32-bit prefetchable memory
base: 0xd0000000, not sized
Base address register at 0x14
not implemented(?)
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x0000
Subsystem ID: 0x0000
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0xa0
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x00 (none)
Interrupt line: 0x00
Capability register at 0xa0
type: 0x02 (AGP, rev. 2.0)
Capability register at 0xc0
type: 0x01 (Power Management, rev. 1.0)
PCI Power Management Capabilities Register
Capabilities register: 0x0002
Version: 1.1
PME# clock: off
Device specific initialization: off
3.3V auxiliary current: self-powered
D1 power management state support: off
D2 power management state support: off
PME# support: 0x00
Control/status register: 0x0000
Power state: D0
PCI Express reserved: off
No soft reset: off
PME# assertion disabled
PME# status: off
Device-dependent header:
0x40: 0x00000000 0x00000000 0x00000000 0x00000000
0x50: 0xb46ba417 0x10100140 0x10080080 0x10101010
0x60: 0x2000aa03 0x00505062 0x07650c50 0x00003108
0x70: 0x0ccc88c8 0x00e2a10e 0x0201b401 0x00000000
0x80: 0x0000400f 0x000000c0 0x00000002 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x0020c002 0x1f000217 0x00000000 0x0014026f
0xb0: 0xa528ed62 0x00603333 0x00000000 0x00000000
0xc0: 0x00020001 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x84000000 0x00000022 0x00000000
Don't know how to pretty-print device-dependent header.
VIA Technologies VT8363 (Apollo KT133) Host Bridge (host bridge, revision 0x03)
at ? dev 0 function 0 (tag 0x80000000, intrtag 0x80000000, intrswiz 0, intrpin
0, i/o off, mem on, no quirks)
pchb0: VIA Technologies VT8363 (Apollo KT133) Host Bridge (rev. 0x03)
agp0 at pchb0 (v2): aperture at 0xd0000000, size 0x10000000
ppb0 at pci0 dev 1 function 0: PCI configuration registers:
Common header:
0x00: 0x83051106 0x22300007 0x06040000 0x00010000
Vendor Name: VIA Technologies (0x1106)
Device Name: VT8363 (Apollo KT133) PCI to AGP Bridge (0x8305)
Command register: 0x0007
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x2230
Capability List support: on
66 MHz capable: on
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: on
Asserted System Error (SERR): off
Parity error detected: off
Class Name: bridge (0x06)
Subclass Name: PCI (0x04)
Interface: 0x00
Revision ID: 0x00
BIST: 0x00
Header Type: 0x01 (0x01)
Latency Timer: 0x00
Cache Line Size: 0x00
Type 1 (PCI-PCI bridge) header:
0x10: 0x00000000 0x00000000 0x00010100 0x0000a0a0
0x20: 0xd9f0d800 0xd7f0d400 0x00000000 0x00000000
0x30: 0x00000000 0x00000080 0x00000000 0x000c0000
Base address register at 0x10
not implemented(?)
Base address register at 0x14
not implemented(?)
Primary bus number: 0x00
Secondary bus number: 0x01
Subordinate bus number: 0x01
Secondary bus latency timer: 0x00
Secondary status register: 0x0000
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detected: off
DEVSEL timing: fast (0x0)
Signaled Target Abort: off
Received Target Abort: off
Received Master Abort: off
System Error: off
Parity Error: off
I/O region:
base register: 0xa0
limit register: 0xa0
base upper 16 bits register: 0x0000
limit upper 16 bits register: 0x0000
Memory region:
base register: 0xd800
limit register: 0xd9f0
Prefetchable memory region:
base register: 0xd400
limit register: 0xd7f0
base upper 32 bits register: 0x00000000
limit upper 32 bits register: 0x00000000
Capability list pointer: 0x80
Expansion ROM Base Address: 0x00000000
Interrupt line: 0x00
Interrupt pin: 0x00 (none)
Bridge control register: 0x000c
Parity error response: off
Secondary SERR forwarding: off
ISA enable: on
VGA enable: on
Master abort reporting: off
Secondary bus reset: off
Fast back-to-back capable: off
Capability register at 0x80
type: 0x01 (Power Management, rev. 1.0)
PCI Power Management Capabilities Register
Capabilities register: 0x0202
Version: 1.1
PME# clock: off
Device specific initialization: off
3.3V auxiliary current: self-powered
D1 power management state support: on
D2 power management state support: off
PME# support: 0x00
Control/status register: 0x0000
Power state: D0
PCI Express reserved: off
No soft reset: off
PME# assertion disabled
PME# status: off
Device-dependent header:
0x40: 0x4408cdc8 0x83057225 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x02020001 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
VIA Technologies VT8363 (Apollo KT133) PCI to AGP Bridge (PCI bridge) at ? dev
1 function 0 (tag 0x80000800, intrtag 0x80000800, intrswiz 0, intrpin 0, i/o
on, mem on, no quirks): VIA Technologies VT8363 (Apollo KT133) PCI to AGP
Bridge (rev. 0x00)
pci1 at ppb0 bus 1
pci1: i/o space, memory space enabled
vga0 at pci1 dev 0 function 0: PCI configuration registers:
Common header:
0x00: 0x50461002 0x02b00087 0x03000000 0x00002008
Vendor Name: ATI Technologies (0x1002)
Device Name: Rage Fury MAXX AGP 4x (TMDS) (0x5046)
Command register: 0x0087
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: on
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x02b0
Capability List support: on
66 MHz capable: on
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: display (0x03)
Subclass Name: VGA (0x00)
Interface: 0x00
Revision ID: 0x00
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x20
Cache Line Size: 0x08
Type 0 ("normal" device) header:
0x10: 0xd4000008 0x0000a001 0xd9000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x00081002
0x30: 0x00000000 0x00000050 0x00000000 0x00080105
Base address register at 0x10
type: 32-bit prefetchable memory
base: 0xd4000000, size: 0x04000000
Base address register at 0x14
type: 32-bit i/o
base: 0x0000a000, size: 0x00000100
Base address register at 0x18
type: 32-bit nonprefetchable memory
base: 0xd9000000, size: 0x00004000
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x1002
Subsystem ID: 0x0008
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0x50
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x08
Interrupt pin: 0x01 (pin A)
Interrupt line: 0x05
Capability register at 0x50
type: 0x02 (AGP, rev. 2.0)
Capability register at 0x5c
type: 0x01 (Power Management, rev. 1.0)
PCI Power Management Capabilities Register
Capabilities register: 0x0202
Version: 1.1
PME# clock: off
Device specific initialization: off
3.3V auxiliary current: self-powered
D1 power management state support: on
D2 power management state support: off
PME# support: 0x00
Control/status register: 0x0000
Power state: D0
PCI Express reserved: off
No soft reset: off
PME# assertion disabled
PME# status: off
Device-dependent header:
0x40: 0x00000000 0x00000000 0x00000000 0x00000000
0x50: 0x00205c02 0x1f000207 0x00000200 0x02020001
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
ATI Technologies Rage Fury MAXX AGP 4x (TMDS) (VGA display) at ? dev 0 function
0 (tag 0x80010000, intrtag 0x80000800, intrswiz 0, intrpin 0x1, i/o on, mem on,
no quirks): ATI Technologies Rage Fury MAXX AGP 4x (TMDS) (rev. 0x00)
wsdisplay0 at vga0 kbdmux 1: console (80x25, vt100 emulation), using wskbd0
wsmux1: connecting to wsdisplay0
r128drm0 at vga0: ATI Rage 128 Pro PF (AGP) (unit 0)
r128drm0: AGP at 0xd0000000 64MB
r128drm0: Initialized r128 2.5.0 20030725
pcib0 at pci0 dev 7 function 0: PCI configuration registers:
Common header:
0x00: 0x06861106 0x02100087 0x06010040 0x00800000
Vendor Name: VIA Technologies (0x1106)
Device Name: VT82C686A PCI-ISA Bridge (0x0686)
Command register: 0x0087
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: on
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x0210
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: bridge (0x06)
Subclass Name: ISA (0x01)
Interface: 0x00
Revision ID: 0x40
BIST: 0x00
Header Type: 0x00+multifunction (0x80)
Latency Timer: 0x00
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0x00000000 0x00000000 0x00000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x00001106
0x30: 0x00000000 0x000000c0 0x00000000 0x00000000
Base address register at 0x10
not implemented(?)
Base address register at 0x14
not implemented(?)
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x1106
Subsystem ID: 0x0000
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0xc0
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x00 (none)
Interrupt line: 0x00
Capability register at 0xc0
type: 0x01 (Power Management, rev. 1.0)
PCI Power Management Capabilities Register
Capabilities register: 0x0002
Version: 1.1
PME# clock: off
Device specific initialization: off
3.3V auxiliary current: self-powered
D1 power management state support: off
D2 power management state support: off
PME# support: 0x00
Control/status register: 0x0000
Power state: D0
PCI Express reserved: off
No soft reset: off
PME# assertion disabled
PME# status: off
Device-dependent header:
0x40: 0x00000100 0xee608000 0x00840001 0xf3f00000
0x50: 0x00347602 0xb09a5000 0x08ff0600 0x00000050
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x02001025 0x40f00000 0x00000000
0x80: 0x00000000 0x00000900 0x02006000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00020001 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00410000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
VIA Technologies VT82C686A PCI-ISA Bridge (ISA bridge, revision 0x40) at ? dev
7 function 0 (tag 0x80003800, intrtag 0x80003800, intrswiz 0, intrpin 0, i/o
on, mem on, no quirks)
pcib0: VIA Technologies VT82C686A PCI-ISA Bridge (rev. 0x40)
viaide0 at pci0 dev 7 function 1: PCI configuration registers:
Common header:
0x00: 0x05711106 0x02900007 0x01018a06 0x00002000
Vendor Name: VIA Technologies (0x1106)
Device Name: VT82C586A IDE Controller (0x0571)
Command register: 0x0007
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x0290
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: mass storage (0x01)
Subclass Name: IDE (0x01)
Interface: 0x8a
Revision ID: 0x06
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x20
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0x00000000 0x00000000 0x00000000 0x00000000
0x20: 0x0000b001 0x00000000 0x00000000 0x00000000
0x30: 0x00000000 0x000000c0 0x00000000 0x000000ff
Base address register at 0x10
not implemented(?)
Base address register at 0x14
not implemented(?)
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
type: 32-bit i/o
base: 0x0000b000, size: 0x00000010
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x0000
Subsystem ID: 0x0000
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0xc0
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x00 (none)
Interrupt line: 0xff
Capability register at 0xc0
type: 0x01 (Power Management, rev. 1.0)
PCI Power Management Capabilities Register
Capabilities register: 0x0002
Version: 1.1
PME# clock: off
Device specific initialization: off
3.3V auxiliary current: self-powered
D1 power management state support: off
D2 power management state support: off
PME# support: 0x00
Control/status register: 0x0000
Power state: D0
PCI Express reserved: off
No soft reset: off
PME# assertion disabled
PME# status: off
Device-dependent header:
0x40: 0x3a09020b 0x00c0101c 0x20a82031 0xffff00ff
0x50: 0xf0030303 0x00000014 0xa8a8a8a8 0x00000000
0x60: 0x00000200 0x00000000 0x00000200 0x00000000
0x70: 0x00000102 0x00000000 0x00000102 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00020001 0x00000000 0x00000000 0x00000000
0xd0: 0x05710006 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
VIA Technologies VT82C586A IDE Controller (IDE mass storage, interface 0x8a,
revision 0x06) at ? dev 7 function 1 (tag 0x80003900, intrtag 0x80003900,
intrswiz 0, intrpin 0, i/o on, mem on, no quirks)
viaide0: VIA Technologies VT82C686A (Apollo KX133) ATA100 controller
viaide0: bus-master DMA support present
viaide0: primary channel configured to compatibility mode
viaide0: primary channel interrupting at irq 14
atabus1 at viaide0 channel 0
viaide0: secondary channel configured to compatibility mode
viaide0: secondary channel interrupting at irq 15
atabus2 at viaide0 channel 1
uhci0 at pci0 dev 7 function 2: PCI configuration registers:
Common header:
0x00: 0x30381106 0x02100007 0x0c030016 0x00002008
Vendor Name: VIA Technologies (0x1106)
Device Name: VT83C572 USB Controller (0x3038)
Command register: 0x0007
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x0210
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: serial bus (0x0c)
Subclass Name: USB (0x03)
Interface: 0x00
Revision ID: 0x16
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x20
Cache Line Size: 0x08
Type 0 ("normal" device) header:
0x10: 0x00000000 0x00000000 0x00000000 0x00000000
0x20: 0x0000b401 0x00000000 0x00000000 0x12340925
0x30: 0x00000000 0x00000080 0x00000000 0x0000040b
Base address register at 0x10
not implemented(?)
Base address register at 0x14
not implemented(?)
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
type: 32-bit i/o
base: 0x0000b400, size: 0x00000020
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x0925
Subsystem ID: 0x1234
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0x80
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x04 (pin D)
Interrupt line: 0x0b
Capability register at 0x80
type: 0x01 (Power Management, rev. 1.0)
PCI Power Management Capabilities Register
Capabilities register: 0x0002
Version: 1.1
PME# clock: off
Device specific initialization: off
3.3V auxiliary current: self-powered
D1 power management state support: off
D2 power management state support: off
PME# support: 0x00
Control/status register: 0x0000
Power state: D0
PCI Express reserved: off
No soft reset: off
PME# assertion disabled
PME# status: off
Device-dependent header:
0x40: 0x00031000 0x303300c2 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000010 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00020001 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00002000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
VIA Technologies VT83C572 USB Controller (USB serial bus, revision 0x16) at ?
dev 7 function 2 (tag 0x80003a00, intrtag 0x80003a00, intrswiz 0, intrpin 0x4,
i/o on, mem on, no quirks): VIA Technologies VT83C572 USB Controller (rev. 0x16)
uhci0: interrupting at irq 11
usb0 at uhci0: USB revision 1.0
uhci1 at pci0 dev 7 function 3: PCI configuration registers:
Common header:
0x00: 0x30381106 0x02100007 0x0c030016 0x00002008
Vendor Name: VIA Technologies (0x1106)
Device Name: VT83C572 USB Controller (0x3038)
Command register: 0x0007
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x0210
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: serial bus (0x0c)
Subclass Name: USB (0x03)
Interface: 0x00
Revision ID: 0x16
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x20
Cache Line Size: 0x08
Type 0 ("normal" device) header:
0x10: 0x00000000 0x00000000 0x00000000 0x00000000
0x20: 0x0000b801 0x00000000 0x00000000 0x12340925
0x30: 0x00000000 0x00000080 0x00000000 0x0000040b
Base address register at 0x10
not implemented(?)
Base address register at 0x14
not implemented(?)
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
type: 32-bit i/o
base: 0x0000b800, size: 0x00000020
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x0925
Subsystem ID: 0x1234
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0x80
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x04 (pin D)
Interrupt line: 0x0b
Capability register at 0x80
type: 0x01 (Power Management, rev. 1.0)
PCI Power Management Capabilities Register
Capabilities register: 0x0002
Version: 1.1
PME# clock: off
Device specific initialization: off
3.3V auxiliary current: self-powered
D1 power management state support: off
D2 power management state support: off
PME# support: 0x00
Control/status register: 0x0000
Power state: D0
PCI Express reserved: off
No soft reset: off
PME# assertion disabled
PME# status: off
Device-dependent header:
0x40: 0x00031000 0x002000c2 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000010 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00020001 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00002000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
VIA Technologies VT83C572 USB Controller (USB serial bus, revision 0x16) at ?
dev 7 function 3 (tag 0x80003b00, intrtag 0x80003b00, intrswiz 0, intrpin 0x4,
i/o on, mem on, no quirks): VIA Technologies VT83C572 USB Controller (rev. 0x16)
uhci1: interrupting at irq 11
usb1 at uhci1: USB revision 1.0
viaenv0 at pci0 dev 7 function 4: PCI configuration registers:
Common header:
0x00: 0x30571106 0x02900000 0x06800040 0x00000000
Vendor Name: VIA Technologies (0x1106)
Device Name: VT82C686A SMBus Controller (0x3057)
Command register: 0x0000
I/O space accesses: off
Memory space accesses: off
Bus mastering: off
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x0290
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: bridge (0x06)
Subclass Name: miscellaneous (0x80)
Interface: 0x00
Revision ID: 0x40
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x00
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0x00000000 0x00000000 0x00000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x00000000
0x30: 0x00000000 0x00000068 0x00000000 0x00000000
Base address register at 0x10
not implemented(?)
Base address register at 0x14
not implemented(?)
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x0000
Subsystem ID: 0x0000
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0x68
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x00 (none)
Interrupt line: 0x00
Capability register at 0x68
type: 0x01 (Power Management, rev. 1.0)
PCI Power Management Capabilities Register
Capabilities register: 0x0002
Version: 1.1
PME# clock: off
Device specific initialization: off
3.3V auxiliary current: self-powered
D1 power management state support: off
D2 power management state support: off
PME# support: 0x00
Control/status register: 0x0000
Power state: D0
PCI Express reserved: off
No soft reset: off
PME# assertion disabled
PME# status: off
Device-dependent header:
0x40: 0x004b8420 0x000030fa 0x00004001 0x00001800
0x50: 0x885cdd00 0x00000450 0x00fffe00 0x00000000
0x60: 0x00000000 0x00000000 0x00020001 0x00000000
0x70: 0x00006001 0x00000001 0x00000000 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00005001 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00010000 0x00400000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
VIA Technologies VT82C686A SMBus Controller (miscellaneous bridge, revision
0x40) at ? dev 7 function 4 (tag 0x80003c00, intrtag 0x80003c00, intrswiz 0,
intrpin 0, i/o off, mem off, no quirks): VIA Technologies VT82C686A Hardware
Monitor
timecounter: Timecounter "viaenv0" frequency 3579545 Hz quality 1000
viaenv0: 24-bit timer
auvia0 at pci0 dev 7 function 5: PCI configuration registers:
Common header:
0x00: 0x30581106 0x02100001 0x04010050 0x00000000
Vendor Name: VIA Technologies (0x1106)
Device Name: VT82C686A AC-97 Audio Controller (0x3058)
Command register: 0x0001
I/O space accesses: on
Memory space accesses: off
Bus mastering: off
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x0210
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: multimedia (0x04)
Subclass Name: audio (0x01)
Interface: 0x00
Revision ID: 0x50
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x00
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0x0000bc01 0x0000c001 0x0000c401 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x760915dd
0x30: 0x00000000 0x000000c0 0x00000000 0x00000309
Base address register at 0x10
type: 32-bit i/o
base: 0x0000bc00, size: 0x00000100
Base address register at 0x14
type: 32-bit i/o
base: 0x0000c000, size: 0x00000004
Base address register at 0x18
type: 32-bit i/o
base: 0x0000c400, size: 0x00000004
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x15dd
Subsystem ID: 0x7609
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0xc0
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x03 (pin C)
Interrupt line: 0x09
Capability register at 0xc0
type: 0x01 (Power Management, rev. 1.0)
PCI Power Management Capabilities Register
Capabilities register: 0x0002
Version: 1.1
PME# clock: off
Device specific initialization: off
3.3V auxiliary current: self-powered
D1 power management state support: off
D2 power management state support: off
PME# support: 0x00
Control/status register: 0x0000
Power state: D0
PCI Express reserved: off
No soft reset: off
PME# assertion disabled
PME# status: off
Device-dependent header:
0x40: 0x1c4ac801 0x00000080 0x02000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00020001 0x00000000 0x00000000 0x00000000
0xd0: 0x00020001 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
VIA Technologies VT82C686A AC-97 Audio Controller (audio multimedia, revision
0x50) at ? dev 7 function 5 (tag 0x80003d00, intrtag 0x80003d00, intrswiz 0,
intrpin 0x3, i/o on, mem off, no quirks): VIA Technologies VT82C686A AC'97
Audio (rev 0x50)
LNKC: Picked IRQ 10 with weight 9
auvia0: interrupting at irq 10
auvia0: ac97: SigmaTel STAC9721/23 codec; 18 bit DAC, 18 bit ADC, SigmaTel 3D
auvia0: ac97: ext id 200<AMAP>
audio0 at auvia0: full duplex, independent
rtk0 at pci0 dev 9 function 0: PCI configuration registers:
Common header:
0x00: 0x813910ec 0x02800007 0x02000010 0x00002000
Vendor Name: Realtek Semiconductor (0x10ec)
Device Name: 8139 10/100 Ethernet (0x8139)
Command register: 0x0007
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x0280
Capability List support: off
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: network (0x02)
Subclass Name: ethernet (0x00)
Interface: 0x00
Revision ID: 0x10
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x20
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0x0000cc01 0xdb001000 0x00000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x813910ec
0x30: 0x00000000 0x00000000 0x00000000 0x4020010a
Base address register at 0x10
type: 32-bit i/o
base: 0x0000cc00, size: 0x00000100
Base address register at 0x14
type: 32-bit nonprefetchable memory
base: 0xdb001000, size: 0x00000100
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x10ec
Subsystem ID: 0x8139
Expansion ROM Base Address: 0x00000000
Reserved @ 0x34: 0x00000000
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x40
Minimum Grant: 0x20
Interrupt pin: 0x01 (pin A)
Interrupt line: 0x0a
Device-dependent header:
0x40: 0x00000000 0x00000000 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
Realtek Semiconductor 8139 10/100 Ethernet (ethernet network, revision 0x10) at
? dev 9 function 0 (tag 0x80004800, intrtag 0x80004800, intrswiz 0, intrpin
0x1, i/o on, mem on, no quirks): Realtek 8139 10/100BaseTX (rev. 0x10)
rtk0: interrupting at irq 10
rtk0: Ethernet address 00:00:1c:d3:c3:13
rlphy0 at rtk0 phy 7: Realtek internal PHY
rlphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
satalink0 at pci0 dev 11 function 0: PCI configuration registers:
Common header:
0x00: 0x35121095 0x02b00007 0x01800001 0x00002008
Vendor Name: CMD Technology (0x1095)
Device Name: SiI3512 SATALink (0x3512)
Command register: 0x0007
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x02b0
Capability List support: on
66 MHz capable: on
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: mass storage (0x01)
Subclass Name: miscellaneous (0x80)
Interface: 0x00
Revision ID: 0x01
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x20
Cache Line Size: 0x08
Type 0 ("normal" device) header:
0x10: 0x0000d001 0x0000d401 0x0000d801 0x0000dc01
0x20: 0x0000e001 0xdb000000 0x00000000 0x35121095
0x30: 0x00000000 0x00000060 0x00000000 0x0000010b
Base address register at 0x10
type: 32-bit i/o
base: 0x0000d000, size: 0x00000008
Base address register at 0x14
type: 32-bit i/o
base: 0x0000d400, size: 0x00000004
Base address register at 0x18
type: 32-bit i/o
base: 0x0000d800, size: 0x00000008
Base address register at 0x1c
type: 32-bit i/o
base: 0x0000dc00, size: 0x00000004
Base address register at 0x20
type: 32-bit i/o
base: 0x0000e000, size: 0x00000010
Base address register at 0x24
type: 32-bit nonprefetchable memory
base: 0xdb000000, size: 0x00000200
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x1095
Subsystem ID: 0x3512
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0x60
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x01 (pin A)
Interrupt line: 0x0b
Capability register at 0x60
type: 0x01 (Power Management, rev. 1.0)
PCI Power Management Capabilities Register
Capabilities register: 0x0622
Version: 1.1
PME# clock: off
Device specific initialization: on
3.3V auxiliary current: self-powered
D1 power management state support: on
D2 power management state support: on
PME# support: 0x00
Control/status register: 0x4000
Power state: D0
PCI Express reserved: off
No soft reset: off
PME# assertion disabled
PME# status: off
Device-dependent header:
0x40: 0x00000002 0x0482e887 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x06220001 0x64004000 0x00000000 0x00000000
0x70: 0x00600000 0x0009f8d0 0x00000000 0x00000000
0x80: 0x00000003 0x00000022 0x00000000 0x9f7bdff7
0x90: 0x0c000000 0x7fffffff 0x18000000 0x00000000
0xa0: 0x65152101 0x62dd62dd 0x43924392 0x40094009
0xb0: 0x65152101 0x62dd62dd 0x43924392 0x40094009
0xc0: 0x00000184 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
CMD Technology SiI3512 SATALink (miscellaneous mass storage, revision 0x01) at
? dev 11 function 0 (tag 0x80005800, intrtag 0x80005800, intrswiz 0, intrpin
0x1, i/o on, mem on, no quirks)
satalink0: Silicon Image SATALink 3512 (rev. 0x01)
satalink0: SATALink BA5 register space disabled
satalink0: bus-master DMA support present
satalink0: primary channel wired to native-PCI mode
satalink0: using irq 11 for native-PCI interrupt
atabus0 at satalink0 channel 0
satalink0: secondary channel wired to native-PCI mode
atabus3 at satalink0 channel 1
isa0 at pcib0
lpt0 at isa0 port 0x378-0x37b irq 7
com0 at isa0 port 0x3f8-0x3ff irq 4: ns16550a, working fifo
com1 at isa0 port 0x2f8-0x2ff irq 3: ns16550a, working fifo
isapnp0 at isa0 port 0x279: ISA Plug 'n Play device support
fdc0 at isa0 port 0x3f0-0x3f7 irq 6 drq 2
isapnp0: no ISA Plug 'n Play devices found
timecounter: Timecounter "clockinterrupt" frequency 100 Hz quality 0
satalink0: port 0: device present, speed: 1.5Gb/s
fd0 at fdc0 drive 0: 1.44MB, 80 cyl, 2 head, 18 sec
uhub0 at usb0: VIA Technologies UHCI root hub, class 9/0, rev 1.00/1.00, addr 1
uhub0: 2 ports with 2 removable, self powered
uhub1 at usb1: VIA Technologies UHCI root hub, class 9/0, rev 1.00/1.00, addr 1
uhub1: 2 ports with 2 removable, self powered
ulpt0 at uhub0 port 1 configuration 1 interface 0
ulpt0: Hewlett-Packard DeskJet 815C, rev 1.00/1.00, addr 2, iclass 7/1
ulpt0: using uni-directional mode
uhub2 at uhub0 port 2: NEC Corporation USB2.0 Hub Controller, class 9/0, rev
2.00/1.00, addr 3
uhub2: 4 ports with 4 removable, self powered
wd1 at atabus1 drive 0: <ST320413A>
wd1: drive supports 16-sector PIO transfers, LBA addressing
wd1: 19092 MB, 38792 cyl, 16 head, 63 sec, 512 bytes/sect x 39102336 sectors
wd1: 32-bit data port
wd1: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 5 (Ultra/100)
wd1(viaide0:0:0): using PIO mode 4, Ultra-DMA mode 5 (Ultra/100) (using DMA)
atapibus0 at atabus2: 2 targets
cd0 at atapibus0 drive 0: <HL-DT-STDVD-ROM GDR8164B, , 0L06> cdrom removable
cd0: 32-bit data port
cd0: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 2 (Ultra/33)
cd1 at atapibus0 drive 1: <TSSTcorp CDDVDW SH-S202N, , SB02> cdrom removable
cd1: 32-bit data port
cd1: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 4 (Ultra/66)
cd0(viaide0:1:0): using PIO mode 4, Ultra-DMA mode 2 (Ultra/33) (using DMA)
cd1(viaide0:1:1): using PIO mode 4, Ultra-DMA mode 4 (Ultra/66) (using DMA)
wd0 at atabus0 drive 0: <ST3500418AS>
wd0: quirks 2<FORCE_LBA48>
wd0: drive supports 16-sector PIO transfers, LBA48 addressing
wd0: 465 GB, 969021 cyl, 16 head, 63 sec, 512 bytes/sect x 976773168 sectors
wd0: 32-bit data port
wd0: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 6 (Ultra/133)
wd0(satalink0:0:0): using PIO mode 4, Ultra-DMA mode 6 (Ultra/133) (using DMA)
pad: requested 1 units
pad0: outputs: 44100Hz, 16-bit, stereo
audio1 at pad0: half duplex
boot device: wd0
root on wd0a dumps on wd0b
dump_misc_init: max_paddr = 0xfff0000
mountroot: trying ffs...
root file system type: ffs
init: copying out path `/sbin/init' 11
wsdisplay0: screen 1 added (80x25, vt100 emulation)
wsdisplay0: screen 2 added (80x25, vt100 emulation)
wsdisplay0: screen 3 added (80x25, vt100 emulation)
wsdisplay0: screen 4 added (80x25, vt100 emulation)
Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
2006, 2007, 2008, 2009
The NetBSD Foundation, Inc. All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
The Regents of the University of California. All rights reserved.
NetBSD 5.0.1_PATCH (HELIOS-$Revision: 1.20 $) #1: Thu Feb 4 21:08:43 CET 2010
ingolf%helios.steinba.ch@localhost:/usr/obj/sys/arch/i386/compile/HELIOS
total memory = 255 MB
avail memory = 245 MB
timecounter: Timecounters tick every 10.000 msec
timecounter: Timecounter "i8254" frequency 1193182 Hz quality 100
VIA Technologies, Inc. VT8363x ( )
PCI BIOS rev. 2.1 found at 0xfb380
pcibios: config mechanism [1][x], special cycles [1][x], last bus 1
PCI IRQ Routing Table rev. 1.0 found at 0xfdd00, size 176 bytes (9 entries)
PCI Interrupt Router at 000:07:0 (VIA Technologies VT82C596A PCI-ISA Bridge
compatible)
PCI Exclusive IRQs: 5 9 10 11
PIR Entry 0:
Bus: 0 Device: 8
INTA: link 0x01 bitmap 0xdeb8
INTB: link 0x02 bitmap 0xdeb8
INTC: link 0x03 bitmap 0xdeb8
INTD: link 0x05 bitmap 0xdeb8
PIR Entry 1:
Bus: 0 Device: 9
INTA: link 0x02 bitmap 0xdeb8
INTB: link 0x03 bitmap 0xdeb8
INTC: link 0x05 bitmap 0xdeb8
INTD: link 0x01 bitmap 0xdeb8
PIR Entry 2:
Bus: 0 Device: 10
INTA: link 0x03 bitmap 0xdeb8
INTB: link 0x05 bitmap 0xdeb8
INTC: link 0x01 bitmap 0xdeb8
INTD: link 0x02 bitmap 0xdeb8
PIR Entry 3:
Bus: 0 Device: 11
INTA: link 0x05 bitmap 0xdeb8
INTB: link 0x01 bitmap 0xdeb8
INTC: link 0x02 bitmap 0xdeb8
INTD: link 0x03 bitmap 0xdeb8
PIR Entry 4:
Bus: 0 Device: 12
INTA: link 0x01 bitmap 0xdeb8
INTB: link 0x02 bitmap 0xdeb8
INTC: link 0x03 bitmap 0xdeb8
INTD: link 0x05 bitmap 0xdeb8
PIR Entry 5:
Bus: 0 Device: 13
INTA: link 0x03 bitmap 0xdeb8
INTB: link 0x05 bitmap 0xdeb8
INTC: link 0x01 bitmap 0xdeb8
INTD: link 0x02 bitmap 0xdeb8
PIR Entry 6:
Bus: 0 Device: 14
INTA: link 0x02 bitmap 0xdeb8
INTB: link 0x03 bitmap 0xdeb8
INTC: link 0x05 bitmap 0xdeb8
INTD: link 0x01 bitmap 0xdeb8
PIR Entry 7:
Bus: 0 Device: 1
INTA: link 0x01 bitmap 0xdeb8
INTB: link 0x02 bitmap 0xdeb8
INTC: link 0x03 bitmap 0xdeb8
INTD: link 0x05 bitmap 0xdeb8
PIR Entry 8:
Bus: 0 Device: 7
INTA: link 0x00 bitmap 0xdeb8
INTB: link 0x00 bitmap 0xdeb8
INTC: link 0x03 bitmap 0xdeb8
INTD: link 0x05 bitmap 0xdeb8
pciintr_link_fixup: PIRQ 0x00 already connected to IRQ 9
pciintr_link_fixup: PIRQ 0x01 already connected to IRQ 10
pciintr_link_fixup: PIRQ 0x02 already connected to IRQ 11
pciintr_link_fixup: PIRQ 0x04 already connected to IRQ 10
pciintr_link_route: route of PIRQ 0x00 -> IRQ 9 preserved BIOS setting
pciintr_link_route: route of PIRQ 0x01 -> IRQ 10 preserved BIOS setting
pciintr_link_route: route of PIRQ 0x02 -> IRQ 11 preserved BIOS setting
pciintr_link_route: route of PIRQ 0x04 -> IRQ 10 preserved BIOS setting
------------------------------------------
device vendor product pin PIRQ IRQ stage
------------------------------------------
000:07:2 0x1106 0x3038 D 0x04 10 0 WARNING: preserving irq 11
000:07:3 0x1106 0x3038 D 0x04 10 0 WARNING: preserving irq 11
000:07:5 0x1106 0x3058 C 0x02 11 0 WARNING: preserving irq 9
000:09:0 0x10ec 0x8139 A 0x01 10 0 already assigned
000:11:0 0x1095 0x3512 A 0x04 10 0 WARNING: preserving irq 11
------------------------------------------
pciintr_irq_release: fixup pciirq level/edge map 0x0e00
pciintr_irq_release: bios pciirq level/edge map 0x0e20
pciintr_irq_release: final pciirq level/edge map 0x0e20
mainbus0 (root)
cpu0 at mainbus0: AMD 686-class, 797MHz, id 0x631
acpi0 at mainbus0: Intel ACPICA 20080321
acpi0: X/RSDT: OemId <BIOSTA,AWRDACPI,42302e31>, AslId <AWRD,00000000>
LNKB: ACPI: Found matching pin for 0.9.INTA at func 0: 10
LNKD: ACPI: Found matching pin for 0.11.INTA at func 0: 11
LNKC: ACPI: Found matching pin for 0.7.INTC at func 5: 9
LNKC: BIOS IRQ 9 for 0.7.INTC is invalid
LNKD: ACPI: Found matching pin for 0.7.INTD at func 2: 11
acpi0: SCI interrupting at int 11
acpi0: fixed-feature power button present
timecounter: Timecounter "ACPI-Fast" frequency 3579545 Hz quality 1000
ACPI-Fast 24-bit timer
acpibut0 at acpi0 (PWRB, PNP0C0C): ACPI Power Button
acpibut1 at acpi0 (SLPB, PNP0C0E): ACPI Sleep Button
attimer0 at acpi0 (TMR, PNP0100): AT Timer
attimer0: io 0x40-0x43 irq 0
pcppi0 at acpi0 (SPKR, PNP0800)
pcppi0: io 0x61
midi0 at pcppi0: PC speaker (CPU-intensive output)
sysbeep0 at pcppi0
npx1 at acpi0 (COPR, PNP0C04)
npx1: io 0xf0-0xff irq 13
npx1: reported by CPUID; using exception 16
FDC0 (PNP0700) [PC standard floppy disk controller] at acpi0 not configured
UAR1 (PNP0501) [16550A-compatible COM port] at acpi0 not configured
UAR2 (PNP0501) [16550A-compatible COM port] at acpi0 not configured
LPT1 (PNP0400) [Standard LPT printer port] at acpi0 not configured
pckbc0 at acpi0 (PS2M, PNP0F13): aux port
pckbc0: irq 12
pckbc1 at acpi0 (PS2K, PNP0303): kbd port
pckbc1: io 0x60,0x64 irq 1
apm0 at acpi0: Power Management spec V1.2
attimer0: attached to pcppi0
pckbd0 at pckbc1 (kbd slot)
pckbc1: using irq 1 for kbd slot
wskbd0 at pckbd0: console keyboard
pms0 at pckbc1 (aux slot)
pckbc1: using irq 12 for aux slot
wsmouse0 at pms0 mux 0
pci0 at mainbus0 bus 0: configuration mode 1
pci0: i/o space, memory space enabled, rd/line, rd/mult, wr/inv ok
pchb0 at pci0 dev 0 function 0: PCI configuration registers:
Common header:
0x00: 0x03051106 0x22100006 0x06000003 0x00000000
Vendor Name: VIA Technologies (0x1106)
Device Name: VT8363 (Apollo KT133) Host Bridge (0x0305)
Command register: 0x0006
I/O space accesses: off
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x2210
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: on
Asserted System Error (SERR): off
Parity error detected: off
Class Name: bridge (0x06)
Subclass Name: host (0x00)
Interface: 0x00
Revision ID: 0x03
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x00
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0xd0000008 0x00000000 0x00000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x00000000
0x30: 0x00000000 0x000000a0 0x00000000 0x00000000
Base address register at 0x10
type: 32-bit prefetchable memory
base: 0xd0000000, not sized
Base address register at 0x14
not implemented(?)
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x0000
Subsystem ID: 0x0000
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0xa0
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x00 (none)
Interrupt line: 0x00
Capability register at 0xa0
type: 0x02 (AGP, rev. 2.0)
Capability register at 0xc0
type: 0x01 (Power Management, rev. 1.0)
PCI Power Management Capabilities Register
Capabilities register: 0x0002
Version: 1.1
PME# clock: off
Device specific initialization: off
3.3V auxiliary current: self-powered
D1 power management state support: off
D2 power management state support: off
PME# support: 0x00
Control/status register: 0x0000
Power state: D0
PCI Express reserved: off
No soft reset: off
PME# assertion disabled
PME# status: off
Device-dependent header:
0x40: 0x00000000 0x00000000 0x00000000 0x00000000
0x50: 0xb46ba417 0x10100140 0x10080080 0x10101010
0x60: 0x2000aa03 0x00505062 0x07650c50 0x00003108
0x70: 0x0ccc88c8 0x00e2a10e 0x0201b401 0x00000000
0x80: 0x0000400f 0x000000c0 0x00000002 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x0020c002 0x1f000217 0x00000000 0x0014026f
0xb0: 0xa528ed62 0x00603333 0x00000000 0x00000000
0xc0: 0x00020001 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x84000000 0x00000022 0x00000000
Don't know how to pretty-print device-dependent header.
VIA Technologies VT8363 (Apollo KT133) Host Bridge (host bridge, revision 0x03)
at ? dev 0 function 0 (tag 0x80000000, intrtag 0x80000000, intrswiz 0, intrpin
0, i/o off, mem on, no quirks)
pchb0: VIA Technologies VT8363 (Apollo KT133) Host Bridge (rev. 0x03)
agp0 at pchb0 (v2): aperture at 0xd0000000, size 0x10000000
ppb0 at pci0 dev 1 function 0: PCI configuration registers:
Common header:
0x00: 0x83051106 0x22300007 0x06040000 0x00010000
Vendor Name: VIA Technologies (0x1106)
Device Name: VT8363 (Apollo KT133) PCI to AGP Bridge (0x8305)
Command register: 0x0007
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x2230
Capability List support: on
66 MHz capable: on
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: on
Asserted System Error (SERR): off
Parity error detected: off
Class Name: bridge (0x06)
Subclass Name: PCI (0x04)
Interface: 0x00
Revision ID: 0x00
BIST: 0x00
Header Type: 0x01 (0x01)
Latency Timer: 0x00
Cache Line Size: 0x00
Type 1 (PCI-PCI bridge) header:
0x10: 0x00000000 0x00000000 0x00010100 0x0000a0a0
0x20: 0xd9f0d800 0xd7f0d400 0x00000000 0x00000000
0x30: 0x00000000 0x00000080 0x00000000 0x000c0000
Base address register at 0x10
not implemented(?)
Base address register at 0x14
not implemented(?)
Primary bus number: 0x00
Secondary bus number: 0x01
Subordinate bus number: 0x01
Secondary bus latency timer: 0x00
Secondary status register: 0x0000
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detected: off
DEVSEL timing: fast (0x0)
Signaled Target Abort: off
Received Target Abort: off
Received Master Abort: off
System Error: off
Parity Error: off
I/O region:
base register: 0xa0
limit register: 0xa0
base upper 16 bits register: 0x0000
limit upper 16 bits register: 0x0000
Memory region:
base register: 0xd800
limit register: 0xd9f0
Prefetchable memory region:
base register: 0xd400
limit register: 0xd7f0
base upper 32 bits register: 0x00000000
limit upper 32 bits register: 0x00000000
Capability list pointer: 0x80
Expansion ROM Base Address: 0x00000000
Interrupt line: 0x00
Interrupt pin: 0x00 (none)
Bridge control register: 0x000c
Parity error response: off
Secondary SERR forwarding: off
ISA enable: on
VGA enable: on
Master abort reporting: off
Secondary bus reset: off
Fast back-to-back capable: off
Capability register at 0x80
type: 0x01 (Power Management, rev. 1.0)
PCI Power Management Capabilities Register
Capabilities register: 0x0202
Version: 1.1
PME# clock: off
Device specific initialization: off
3.3V auxiliary current: self-powered
D1 power management state support: on
D2 power management state support: off
PME# support: 0x00
Control/status register: 0x0000
Power state: D0
PCI Express reserved: off
No soft reset: off
PME# assertion disabled
PME# status: off
Device-dependent header:
0x40: 0x4408cdc8 0x83057225 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x02020001 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
VIA Technologies VT8363 (Apollo KT133) PCI to AGP Bridge (PCI bridge) at ? dev
1 function 0 (tag 0x80000800, intrtag 0x80000800, intrswiz 0, intrpin 0, i/o
on, mem on, no quirks): VIA Technologies VT8363 (Apollo KT133) PCI to AGP
Bridge (rev. 0x00)
pci1 at ppb0 bus 1
pci1: i/o space, memory space enabled
vga0 at pci1 dev 0 function 0: PCI configuration registers:
Common header:
0x00: 0x50461002 0x02b00087 0x03000000 0x00002008
Vendor Name: ATI Technologies (0x1002)
Device Name: Rage Fury MAXX AGP 4x (TMDS) (0x5046)
Command register: 0x0087
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: on
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x02b0
Capability List support: on
66 MHz capable: on
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: display (0x03)
Subclass Name: VGA (0x00)
Interface: 0x00
Revision ID: 0x00
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x20
Cache Line Size: 0x08
Type 0 ("normal" device) header:
0x10: 0xd4000008 0x0000a001 0xd9000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x00081002
0x30: 0x00000000 0x00000050 0x00000000 0x00080105
Base address register at 0x10
type: 32-bit prefetchable memory
base: 0xd4000000, size: 0x04000000
Base address register at 0x14
type: 32-bit i/o
base: 0x0000a000, size: 0x00000100
Base address register at 0x18
type: 32-bit nonprefetchable memory
base: 0xd9000000, size: 0x00004000
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x1002
Subsystem ID: 0x0008
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0x50
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x08
Interrupt pin: 0x01 (pin A)
Interrupt line: 0x05
Capability register at 0x50
type: 0x02 (AGP, rev. 2.0)
Capability register at 0x5c
type: 0x01 (Power Management, rev. 1.0)
PCI Power Management Capabilities Register
Capabilities register: 0x0202
Version: 1.1
PME# clock: off
Device specific initialization: off
3.3V auxiliary current: self-powered
D1 power management state support: on
D2 power management state support: off
PME# support: 0x00
Control/status register: 0x0000
Power state: D0
PCI Express reserved: off
No soft reset: off
PME# assertion disabled
PME# status: off
Device-dependent header:
0x40: 0x00000000 0x00000000 0x00000000 0x00000000
0x50: 0x00205c02 0x1f000207 0x00000200 0x02020001
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
ATI Technologies Rage Fury MAXX AGP 4x (TMDS) (VGA display) at ? dev 0 function
0 (tag 0x80010000, intrtag 0x80000800, intrswiz 0, intrpin 0x1, i/o on, mem on,
no quirks): ATI Technologies Rage Fury MAXX AGP 4x (TMDS) (rev. 0x00)
wsdisplay0 at vga0 kbdmux 1: console (80x25, vt100 emulation), using wskbd0
wsmux1: connecting to wsdisplay0
r128drm0 at vga0: ATI Rage 128 Pro PF (AGP) (unit 0)
r128drm0: AGP at 0xd0000000 64MB
r128drm0: Initialized r128 2.5.0 20030725
pcib0 at pci0 dev 7 function 0: PCI configuration registers:
Common header:
0x00: 0x06861106 0x02100087 0x06010040 0x00800000
Vendor Name: VIA Technologies (0x1106)
Device Name: VT82C686A PCI-ISA Bridge (0x0686)
Command register: 0x0087
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: on
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x0210
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: bridge (0x06)
Subclass Name: ISA (0x01)
Interface: 0x00
Revision ID: 0x40
BIST: 0x00
Header Type: 0x00+multifunction (0x80)
Latency Timer: 0x00
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0x00000000 0x00000000 0x00000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x00001106
0x30: 0x00000000 0x000000c0 0x00000000 0x00000000
Base address register at 0x10
not implemented(?)
Base address register at 0x14
not implemented(?)
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x1106
Subsystem ID: 0x0000
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0xc0
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x00 (none)
Interrupt line: 0x00
Capability register at 0xc0
type: 0x01 (Power Management, rev. 1.0)
PCI Power Management Capabilities Register
Capabilities register: 0x0002
Version: 1.1
PME# clock: off
Device specific initialization: off
3.3V auxiliary current: self-powered
D1 power management state support: off
D2 power management state support: off
PME# support: 0x00
Control/status register: 0x0000
Power state: D0
PCI Express reserved: off
No soft reset: off
PME# assertion disabled
PME# status: off
Device-dependent header:
0x40: 0x00000100 0xe6608000 0x00840001 0xf3f00000
0x50: 0x00347602 0xb09a5000 0x08ff0600 0x00000050
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x02001025 0x40f00000 0x00000000
0x80: 0x00000000 0x00000900 0x02006000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00020001 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00410000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
VIA Technologies VT82C686A PCI-ISA Bridge (ISA bridge, revision 0x40) at ? dev
7 function 0 (tag 0x80003800, intrtag 0x80003800, intrswiz 0, intrpin 0, i/o
on, mem on, no quirks)
pcib0: VIA Technologies VT82C686A PCI-ISA Bridge (rev. 0x40)
viaide0 at pci0 dev 7 function 1: PCI configuration registers:
Common header:
0x00: 0x05711106 0x02900007 0x01018a06 0x00002000
Vendor Name: VIA Technologies (0x1106)
Device Name: VT82C586A IDE Controller (0x0571)
Command register: 0x0007
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x0290
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: mass storage (0x01)
Subclass Name: IDE (0x01)
Interface: 0x8a
Revision ID: 0x06
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x20
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0x00000000 0x00000000 0x00000000 0x00000000
0x20: 0x0000b001 0x00000000 0x00000000 0x00000000
0x30: 0x00000000 0x000000c0 0x00000000 0x000000ff
Base address register at 0x10
not implemented(?)
Base address register at 0x14
not implemented(?)
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
type: 32-bit i/o
base: 0x0000b000, size: 0x00000010
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x0000
Subsystem ID: 0x0000
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0xc0
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x00 (none)
Interrupt line: 0xff
Capability register at 0xc0
type: 0x01 (Power Management, rev. 1.0)
PCI Power Management Capabilities Register
Capabilities register: 0x0002
Version: 1.1
PME# clock: off
Device specific initialization: off
3.3V auxiliary current: self-powered
D1 power management state support: off
D2 power management state support: off
PME# support: 0x00
Control/status register: 0x0000
Power state: D0
PCI Express reserved: off
No soft reset: off
PME# assertion disabled
PME# status: off
Device-dependent header:
0x40: 0x3a09e20b 0x00c0101c 0xa8a82031 0xffff00ff
0x50: 0x03030303 0x00000014 0xa8a8a8a8 0x00000000
0x60: 0x00000200 0x00000000 0x00000200 0x00000000
0x70: 0x00000102 0x00000000 0x00000140 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00020001 0x00000000 0x00000000 0x00000000
0xd0: 0x05710006 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
VIA Technologies VT82C586A IDE Controller (IDE mass storage, interface 0x8a,
revision 0x06) at ? dev 7 function 1 (tag 0x80003900, intrtag 0x80003900,
intrswiz 0, intrpin 0, i/o on, mem on, no quirks)
viaide0: VIA Technologies VT82C686A (Apollo KX133) ATA100 controller
viaide0: bus-master DMA support present
viaide0: primary channel configured to compatibility mode
viaide0: primary channel interrupting at irq 14
atabus1 at viaide0 channel 0
viaide0: secondary channel configured to compatibility mode
viaide0: secondary channel interrupting at irq 15
atabus2 at viaide0 channel 1
uhci0 at pci0 dev 7 function 2: PCI configuration registers:
Common header:
0x00: 0x30381106 0x02100007 0x0c030016 0x00002008
Vendor Name: VIA Technologies (0x1106)
Device Name: VT83C572 USB Controller (0x3038)
Command register: 0x0007
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x0210
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: serial bus (0x0c)
Subclass Name: USB (0x03)
Interface: 0x00
Revision ID: 0x16
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x20
Cache Line Size: 0x08
Type 0 ("normal" device) header:
0x10: 0x00000000 0x00000000 0x00000000 0x00000000
0x20: 0x0000b401 0x00000000 0x00000000 0x12340925
0x30: 0x00000000 0x00000080 0x00000000 0x0000040b
Base address register at 0x10
not implemented(?)
Base address register at 0x14
not implemented(?)
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
type: 32-bit i/o
base: 0x0000b400, size: 0x00000020
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x0925
Subsystem ID: 0x1234
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0x80
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x04 (pin D)
Interrupt line: 0x0b
Capability register at 0x80
type: 0x01 (Power Management, rev. 1.0)
PCI Power Management Capabilities Register
Capabilities register: 0x0002
Version: 1.1
PME# clock: off
Device specific initialization: off
3.3V auxiliary current: self-powered
D1 power management state support: off
D2 power management state support: off
PME# support: 0x00
Control/status register: 0x0000
Power state: D0
PCI Express reserved: off
No soft reset: off
PME# assertion disabled
PME# status: off
Device-dependent header:
0x40: 0x00031000 0xf03300c2 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000010 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00020001 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00002000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
VIA Technologies VT83C572 USB Controller (USB serial bus, revision 0x16) at ?
dev 7 function 2 (tag 0x80003a00, intrtag 0x80003a00, intrswiz 0, intrpin 0x4,
i/o on, mem on, no quirks): VIA Technologies VT83C572 USB Controller (rev. 0x16)
uhci0: interrupting at irq 11
usb0 at uhci0: USB revision 1.0
uhci1 at pci0 dev 7 function 3: PCI configuration registers:
Common header:
0x00: 0x30381106 0x02100007 0x0c030016 0x00002008
Vendor Name: VIA Technologies (0x1106)
Device Name: VT83C572 USB Controller (0x3038)
Command register: 0x0007
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x0210
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: serial bus (0x0c)
Subclass Name: USB (0x03)
Interface: 0x00
Revision ID: 0x16
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x20
Cache Line Size: 0x08
Type 0 ("normal" device) header:
0x10: 0x00000000 0x00000000 0x00000000 0x00000000
0x20: 0x0000b801 0x00000000 0x00000000 0x12340925
0x30: 0x00000000 0x00000080 0x00000000 0x0000040b
Base address register at 0x10
not implemented(?)
Base address register at 0x14
not implemented(?)
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
type: 32-bit i/o
base: 0x0000b800, size: 0x00000020
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x0925
Subsystem ID: 0x1234
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0x80
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x04 (pin D)
Interrupt line: 0x0b
Capability register at 0x80
type: 0x01 (Power Management, rev. 1.0)
PCI Power Management Capabilities Register
Capabilities register: 0x0002
Version: 1.1
PME# clock: off
Device specific initialization: off
3.3V auxiliary current: self-powered
D1 power management state support: off
D2 power management state support: off
PME# support: 0x00
Control/status register: 0x0000
Power state: D0
PCI Express reserved: off
No soft reset: off
PME# assertion disabled
PME# status: off
Device-dependent header:
0x40: 0x00031000 0x002000c2 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000010 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00020001 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00002000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
VIA Technologies VT83C572 USB Controller (USB serial bus, revision 0x16) at ?
dev 7 function 3 (tag 0x80003b00, intrtag 0x80003b00, intrswiz 0, intrpin 0x4,
i/o on, mem on, no quirks): VIA Technologies VT83C572 USB Controller (rev. 0x16)
uhci1: interrupting at irq 11
usb1 at uhci1: USB revision 1.0
viaenv0 at pci0 dev 7 function 4: PCI configuration registers:
Common header:
0x00: 0x30571106 0x02900000 0x06800040 0x00000000
Vendor Name: VIA Technologies (0x1106)
Device Name: VT82C686A SMBus Controller (0x3057)
Command register: 0x0000
I/O space accesses: off
Memory space accesses: off
Bus mastering: off
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x0290
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: bridge (0x06)
Subclass Name: miscellaneous (0x80)
Interface: 0x00
Revision ID: 0x40
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x00
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0x00000000 0x00000000 0x00000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x00000000
0x30: 0x00000000 0x00000068 0x00000000 0x00000000
Base address register at 0x10
not implemented(?)
Base address register at 0x14
not implemented(?)
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x0000
Subsystem ID: 0x0000
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0x68
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x00 (none)
Interrupt line: 0x00
Capability register at 0x68
type: 0x01 (Power Management, rev. 1.0)
PCI Power Management Capabilities Register
Capabilities register: 0x0002
Version: 1.1
PME# clock: off
Device specific initialization: off
3.3V auxiliary current: self-powered
D1 power management state support: off
D2 power management state support: off
PME# support: 0x00
Control/status register: 0x0000
Power state: D0
PCI Express reserved: off
No soft reset: off
PME# assertion disabled
PME# status: off
Device-dependent header:
0x40: 0x005b8420 0x000030fa 0x00004001 0x00001800
0x50: 0x885cdd00 0x00000450 0x00fffe00 0x00000000
0x60: 0x00000000 0x00000000 0x00020001 0x00000000
0x70: 0x00006001 0x00000001 0x00000000 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00005001 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00010000 0x00400000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
VIA Technologies VT82C686A SMBus Controller (miscellaneous bridge, revision
0x40) at ? dev 7 function 4 (tag 0x80003c00, intrtag 0x80003c00, intrswiz 0,
intrpin 0, i/o off, mem off, no quirks): VIA Technologies VT82C686A Hardware
Monitor
timecounter: Timecounter "viaenv0" frequency 3579545 Hz quality 1000
viaenv0: 24-bit timer
auvia0 at pci0 dev 7 function 5: PCI configuration registers:
Common header:
0x00: 0x30581106 0x02100001 0x04010050 0x00000000
Vendor Name: VIA Technologies (0x1106)
Device Name: VT82C686A AC-97 Audio Controller (0x3058)
Command register: 0x0001
I/O space accesses: on
Memory space accesses: off
Bus mastering: off
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x0210
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: multimedia (0x04)
Subclass Name: audio (0x01)
Interface: 0x00
Revision ID: 0x50
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x00
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0x0000bc01 0x0000c001 0x0000c401 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x760915dd
0x30: 0x00000000 0x000000c0 0x00000000 0x00000309
Base address register at 0x10
type: 32-bit i/o
base: 0x0000bc00, size: 0x00000100
Base address register at 0x14
type: 32-bit i/o
base: 0x0000c000, size: 0x00000004
Base address register at 0x18
type: 32-bit i/o
base: 0x0000c400, size: 0x00000004
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x15dd
Subsystem ID: 0x7609
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0xc0
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x03 (pin C)
Interrupt line: 0x09
Capability register at 0xc0
type: 0x01 (Power Management, rev. 1.0)
PCI Power Management Capabilities Register
Capabilities register: 0x0002
Version: 1.1
PME# clock: off
Device specific initialization: off
3.3V auxiliary current: self-powered
D1 power management state support: off
D2 power management state support: off
PME# support: 0x00
Control/status register: 0x0000
Power state: D0
PCI Express reserved: off
No soft reset: off
PME# assertion disabled
PME# status: off
Device-dependent header:
0x40: 0x1c4ac801 0x00000080 0x02000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00020001 0x00000000 0x00000000 0x00000000
0xd0: 0x00020001 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
VIA Technologies VT82C686A AC-97 Audio Controller (audio multimedia, revision
0x50) at ? dev 7 function 5 (tag 0x80003d00, intrtag 0x80003d00, intrswiz 0,
intrpin 0x3, i/o on, mem off, no quirks): VIA Technologies VT82C686A AC'97
Audio (rev 0x50)
LNKC: Picked IRQ 10 with weight 9
auvia0: interrupting at irq 10
auvia0: ac97: SigmaTel STAC9721/23 codec; 18 bit DAC, 18 bit ADC, SigmaTel 3D
auvia0: ac97: ext id 200<AMAP>
audio0 at auvia0: full duplex, independent
rtk0 at pci0 dev 9 function 0: PCI configuration registers:
Common header:
0x00: 0x813910ec 0x02800007 0x02000010 0x00002000
Vendor Name: Realtek Semiconductor (0x10ec)
Device Name: 8139 10/100 Ethernet (0x8139)
Command register: 0x0007
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x0280
Capability List support: off
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: network (0x02)
Subclass Name: ethernet (0x00)
Interface: 0x00
Revision ID: 0x10
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x20
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0x0000cc01 0xdb001000 0x00000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x813910ec
0x30: 0x00000000 0x00000000 0x00000000 0x4020010a
Base address register at 0x10
type: 32-bit i/o
base: 0x0000cc00, size: 0x00000100
Base address register at 0x14
type: 32-bit nonprefetchable memory
base: 0xdb001000, size: 0x00000100
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x10ec
Subsystem ID: 0x8139
Expansion ROM Base Address: 0x00000000
Reserved @ 0x34: 0x00000000
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x40
Minimum Grant: 0x20
Interrupt pin: 0x01 (pin A)
Interrupt line: 0x0a
Device-dependent header:
0x40: 0x00000000 0x00000000 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
Realtek Semiconductor 8139 10/100 Ethernet (ethernet network, revision 0x10) at
? dev 9 function 0 (tag 0x80004800, intrtag 0x80004800, intrswiz 0, intrpin
0x1, i/o on, mem on, no quirks): Realtek 8139 10/100BaseTX (rev. 0x10)
rtk0: interrupting at irq 10
rtk0: Ethernet address 00:00:1c:d3:c3:13
rlphy0 at rtk0 phy 7: Realtek internal PHY
rlphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
satalink0 at pci0 dev 11 function 0: PCI configuration registers:
Common header:
0x00: 0x35121095 0x02b00007 0x01800001 0x00002008
Vendor Name: CMD Technology (0x1095)
Device Name: SiI3512 SATALink (0x3512)
Command register: 0x0007
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x02b0
Capability List support: on
66 MHz capable: on
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: mass storage (0x01)
Subclass Name: miscellaneous (0x80)
Interface: 0x00
Revision ID: 0x01
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x20
Cache Line Size: 0x08
Type 0 ("normal" device) header:
0x10: 0x0000d001 0x0000d401 0x0000d801 0x0000dc01
0x20: 0x0000e001 0xdb000000 0x00000000 0x35121095
0x30: 0x00000000 0x00000060 0x00000000 0x0000010b
Base address register at 0x10
type: 32-bit i/o
base: 0x0000d000, size: 0x00000008
Base address register at 0x14
type: 32-bit i/o
base: 0x0000d400, size: 0x00000004
Base address register at 0x18
type: 32-bit i/o
base: 0x0000d800, size: 0x00000008
Base address register at 0x1c
type: 32-bit i/o
base: 0x0000dc00, size: 0x00000004
Base address register at 0x20
type: 32-bit i/o
base: 0x0000e000, size: 0x00000010
Base address register at 0x24
type: 32-bit nonprefetchable memory
base: 0xdb000000, size: 0x00000200
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x1095
Subsystem ID: 0x3512
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0x60
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x01 (pin A)
Interrupt line: 0x0b
Capability register at 0x60
type: 0x01 (Power Management, rev. 1.0)
PCI Power Management Capabilities Register
Capabilities register: 0x0622
Version: 1.1
PME# clock: off
Device specific initialization: on
3.3V auxiliary current: self-powered
D1 power management state support: on
D2 power management state support: on
PME# support: 0x00
Control/status register: 0x4000
Power state: D0
PCI Express reserved: off
No soft reset: off
PME# assertion disabled
PME# status: off
Device-dependent header:
0x40: 0x00000002 0x0482e887 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x06220001 0x64004000 0x00000000 0x00000000
0x70: 0x00600000 0x0009f8d0 0x00000000 0x00000000
0x80: 0x00000003 0x00000022 0x00000000 0x9f7bdff7
0x90: 0x0c000000 0x7fffffff 0x18000000 0x00000000
0xa0: 0x65152101 0x62dd62dd 0x43924392 0x40094009
0xb0: 0x65152101 0x62dd62dd 0x43924392 0x40094009
0xc0: 0x00000184 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
CMD Technology SiI3512 SATALink (miscellaneous mass storage, revision 0x01) at
? dev 11 function 0 (tag 0x80005800, intrtag 0x80005800, intrswiz 0, intrpin
0x1, i/o on, mem on, no quirks)
satalink0: Silicon Image SATALink 3512 (rev. 0x01)
satalink0: SATALink BA5 register space disabled
satalink0: bus-master DMA support present
satalink0: primary channel wired to native-PCI mode
satalink0: using irq 11 for native-PCI interrupt
atabus0 at satalink0 channel 0
satalink0: secondary channel wired to native-PCI mode
atabus3 at satalink0 channel 1
isa0 at pcib0
lpt0 at isa0 port 0x378-0x37b irq 7
com0 at isa0 port 0x3f8-0x3ff irq 4: ns16550a, working fifo
com1 at isa0 port 0x2f8-0x2ff irq 3: ns16550a, working fifo
isapnp0 at isa0 port 0x279: ISA Plug 'n Play device support
fdc0 at isa0 port 0x3f0-0x3f7 irq 6 drq 2
isapnp0: no ISA Plug 'n Play devices found
timecounter: Timecounter "clockinterrupt" frequency 100 Hz quality 0
satalink0: port 0: device present, speed: 1.5Gb/s
fd0 at fdc0 drive 0: 1.44MB, 80 cyl, 2 head, 18 sec
atapibus0 at atabus2: 2 targets
cd0 at atapibus0 drive 0: <HL-DT-STDVD-ROM GDR8164B, , 0L06> cdrom removable
uhub0 at usb0: VIA Technologies UHCI root hub, class 9/0, rev 1.00/1.00, addr 1
uhub0: 2 ports with 2 removable, self powered
uhub1 at usb1: VIA Technologies UHCI root hub, class 9/0, rev 1.00/1.00, addr 1
uhub1: 2 ports with 2 removable, self powered
cd0: 32-bit data port
cd0: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 2 (Ultra/33)
cd1 at atapibus0 drive 1: <TSSTcorp CDDVDW SH-S202N, , SB02> cdrom removable
cd1: 32-bit data port
cd1: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 4 (Ultra/66)
cd0(viaide0:1:0): using PIO mode 4, Ultra-DMA mode 2 (Ultra/33) (using DMA)
cd1(viaide0:1:1): using PIO mode 4, Ultra-DMA mode 4 (Ultra/66) (using DMA)
wd0 at atabus0 drive 0: <ST3500418AS>
wd0: quirks 2<FORCE_LBA48>
wd0: drive supports 16-sector PIO transfers, LBA48 addressing
wd0: 465 GB, 969021 cyl, 16 head, 63 sec, 512 bytes/sect x 976773168 sectors
wd0: 32-bit data port
wd0: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 6 (Ultra/133)
wd0(satalink0:0:0): using PIO mode 4, Ultra-DMA mode 6 (Ultra/133) (using DMA)
ulpt0 at uhub0 port 1 configuration 1 interface 0
ulpt0: Hewlett-Packard DeskJet 815C, rev 1.00/1.00, addr 2, iclass 7/1
ulpt0: using uni-directional mode
uhub2 at uhub0 port 2: NEC Corporation USB2.0 Hub Controller, class 9/0, rev
2.00/1.00, addr 3
uhub2: 4 ports with 4 removable, self powered
pad: requested 1 units
pad0: outputs: 44100Hz, 16-bit, stereo
audio1 at pad0: half duplex
boot device: wd0
root on wd0a dumps on wd0b
dump_misc_init: max_paddr = 0xfff0000
mountroot: trying ffs...
root file system type: ffs
init: copying out path `/sbin/init' 11
wsdisplay0: screen 1 added (80x25, vt100 emulation)
wsdisplay0: screen 2 added (80x25, vt100 emulation)
wsdisplay0: screen 3 added (80x25, vt100 emulation)
wsdisplay0: screen 4 added (80x25, vt100 emulation)
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