Re: blocking software interrupt thread & reentrancy

[Andrew Doran <ad%NetBSD.org@localhost>]

On Wed, Sep 22, 2010 at 01:42:04PM +0200, Manuel Bouyer wrote:
> Hello,
> I have a question about software interrupt threads (__HAVE_FAST_SOFTINTS
> case). I'm interrested in the mips implementation but I looked at x86
> and didn't find what I looked for either, so my question applies to
> both.
> 
> When a software interrupt is triggered, the CPU switches to
> the related kernel thread by changing the curlwp and stack pointers
> (softint_fast_dispatch() for mips, Xsoftintr(),for x86).
> This is triggered by a bit set in a bitmask by softint_trigger().
> For both mips and x86, this bit is cleared from the bitmask
> before invoking softint_fast_dispatch or Xsoftintr.
> 
> Now, if the softint thread blocks (this is allowed), another thread will
> get scheduled and the IPL will go back to IPL_NONE. I can't see what prevents
> another soft interrupt to be requested and the softint thread that
> is blocking from being switched to again, overwriting the blocking context.
> I'm probably missing something (I can't believe x86 avoided the issue
> by luck for so long), can someone helps me ?

There is a toggle in the MI soft interrupt record (softint_t::si_active).
It gets set when a soft interrupt level is triggered, and is only cleared
when processing for that level on that CPU runs to completion (i.e. no
handlers waiting to be run).