tech-kern archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

Re: A simple cpufreq(9)



On Thu, Sep 29, 2011 at 09:26:12AM -0500, Paul_Koning%Dell.com@localhost wrote:
 > >>> The cache and mmu are probably harder than the cpu :-)
 > >>>      
 > >> I'm not sure the PDP-10 even _had_ cache; I'd have to do some digging 
 > >> on that score.  And I have no idea what it had for an MMU.  The only 
 > >> non-power-of-two-word-size machine I've ever actually used, as far as 
 > >> I can recall, was a PDP-8.  I'm interested in NetBSD/pdp10 less for 
 > >> personal nostalgia value than for the code cleanup it would enforce.
 > 
 > One "minor" problem is to get gcc to cope with that.  There's a
 > very old gcc port (2.95 era), I'm not sure how complete that is.
 > At that time gcc had machinery in it for dealing with machines
 > whose byte is not 8 bits, and/or that are not byte addressable.
 > The former is gone now, and the latter may also be.  (Maybe not;
 > there might still be DSP-type gcc targets that use it.)  It doesn't
 > seem horribly difficult to resurrect it, though.

As ragge has posted before, he originally took up pcc to address this
problem :-)

(I think it would probably be more effective, if not as
retro-attractive, to define a new 36-bit architecture... this would
make a bunch of routine stuff easier and allow concentrating on the
36-bit issues.)

-- 
David A. Holland
dholland%netbsd.org@localhost


Home | Main Index | Thread Index | Old Index