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Re: machfb MMIO versus SPARCle OFW
On Tue, 22 Oct 2013 11:50:43 +0100
Julian Coleman <jdc%coris.org.uk@localhost> wrote:
> > Eww. IIRC that's supposed to turn off the register block that lives in
> > the upper 2KB of each half aperture, it didn't cause any problems with
> > other other Sun or Apple mach64 OFW that I have here. Should really
> > only be done when we have 8MB VRAM and the registers would overlap with
> > it.
>
> Not sure why it causes the problem on SPARCle then. It has a Rage L
> Mobility, which I don't think is in any other machine that we use mach64
> on (I had to add it to the match routine). Also, it's possible that the
> firmware is slightly different from the standard Sun version.
Maybe the sparcle firmware uses the blitter. Most Sun and Apple
firmware for PCI graphics chips I've seen runs the hardware as dumb
framebuffers ( unlike for example SBus and UPA hardware ) but nothing
keeps them from using it.
> > Does sparcle's mach64 have 8MB VRAM? I've got an 8MB PGX64 to play with.
>
> Yes. dmesg is:
>
> machfb0 at pci0 dev 19 function 0: ATI Technologies Rage L Mobility (PCI)
> (rev. 0x64)
> machfb0: using MMIO aperture
> machfb0: 16 MB aperture at 0x03000000, 4 KB registers at 0x0000a000
> machfb0: 128 KB ROM at 0x00020000
> machfb0: 8192 KB SDRAM 55.815 MHz, maximum RAMDAC clock 230 MHz
> machfb0: initial resolution 1400x1050 at 8 bpp
> machfb0: attached to /dev/fb0
>
> > Actually, we can probably leave the registers enabled anyway, and only
> > turn them off if something tries to mmap that last bit of video RAM.
> > IIRC machfb itself doesn't need VRAM access at all, and the whole song
> > & dance is mostly intended for X.
>
> Not altering the BUS_CNTL register would seem easier. However, detach does
> work if that's not possible.
Guess it's better to leave it alone then - X should know how to deal
with it if needed ( and if there are problems then they need to be
fixed on that side )
I'll dig up my PGX64.
have fun
Michael
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