tech-kern archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

RE: ixg(4) performances



> On Friday, August 29, 2014 11:51, Emmanuel Dreyfus wrote:
> 
> On Fri, Aug 29, 2014 at 08:48:51AM -0400, Terry Moore wrote:
> > Still, you should check whether you have the right number of the right
> > generation of PCIe lanes connected to the ixg.
> 
> I found this, but the result does not make sense: negociated > max ...
> 
> Link Capabilities Ragister (0xAC): 0x00027482
> bits 3:0   Supprted Link speed:  0010 = 5 GbE and 2.5 GbE speed supported
> bits 9:4   Max link width: 001000 = x4
> bits 14:12 L0s exit lattency: 101 = 1 µs - 2 µs bits 17:15 L1 Exit
> lattency: 011 = 4 µs - 8 µs
> 
> Link Status Register (0xB2): 0x1081
> bits 3:0   Current Link speed:  0001 = 2.5 GbE PCIe link
> bits 9:4   Negociated link width: 001000 = x8

I think there's a typo in the docs. In the PCIe spec, it says (for Link
Capabilities Register, table 7-15): 001000b is x8.  

But it's running at gen1. I strongly suspect that the benchmark case was
gen2 (since the ixg is capable of it).

Is the ixg in an expansion slot or integrated onto the main board?

--Terry  



Home | Main Index | Thread Index | Old Index