Re: NVMM missing opcode REPE CMPS implementation

[Maxime Villard <max%m00nbsd.net@localhost>]

Le 29/10/2020 à 21:54, Reinoud Zandijk a écrit :
> Dear folks,
>
> i stumbled on an instruction that NVMM couldn't code and thus couldn't
> emulate either. It was as stated the REPE CMPS (0xF3A7) instruction as stated
> in https://c9x.me/x86/html/file_module_x86_id_279.html and confirmed by
> disassembly by ndisasm (from nasm).
>
> Appended is the implementation of imentioned instruction together with its
> byte sized sibling 0xF3A6. When installing the modified libnvmm, qemu behaves
> like NVMM is not used. I think the implementation does the right thing but
> feel free to double check!
>
> Tested and found by NetBSD/amd64 9.99.74 (19 oct) on an Intel Celeron 2957U by
> executing:
> 	qemu-system-x86_64 -accel nvmm -nographic -netdev \
> 		user,id=n0,tftp=/usr/mdec,bootfile=pxeboot_ia32.bin -device \
> 		e1000,netdev=n0 -boot n
>
> With regards,
> Reinoud

This is incorrect and you should revert. x86_emul_cmp deals with single memory
operands, not double. And rdi+rsi must be incremented/decremented depending on
PSL_D. Also you added printfs in the library, wtf?

As a general rule each instruction that libnvmm can emulate should have unit
tests in t_mem_assist -- in fact here a single test case would have shown that
the code is obviously wrong.

Maxime