In message <199605211906.TAA09497@whydos.lkg.dec.com>, you write:
>I am positive that it is the case.  The 21x4x (de driver) chips do not 
>DMA the data such that the Ethernet header is longword aligned.

>On output, that is exactly what is done.  On input, depending on the
>hardware, it should be done but it's not always possible.

	Ok, so the answer to my question is that it should work like 4.4,
but, for some of the low-level drivers, it's not possible to do so, and
the overhead of a copy is a non-starter (for big packets, I agree). (I know
many of the bus masters such as PCnet and Tulip types want their ring buffers
8-byte aligned so you can't offset it to fix the alignment later)

	If this is so, then why are some of the drivers where the hardware
doesn't impose this limitation not aligning things? (in the case I'm seeing,
the 3c5x9 driver, which uses interrrupt-driven I/O last time I checked, is
not aligning things. It really can and should.)

								-Craig