>BBN built a router with an architecture very similar to this several years
>ago, and published at least one paper on it.  The router ran NetBSD on the
>host processor, more or less the RP in your architecture.

Partridge, Carvey, et. al, (via http://www.net-tech.bbn.com/~craig/)?
I once put it to Craig Partridge that the approach was basically
"microcoding an IP forwarding engine using Alpha 21164 insns"
(~400Mhz alpha) rather than ``traditional'' microcode or FPGAs.
Craig agreed.

At one point, I beleive Craig also said the darn thing was so
memory-dominated (or the inner IP fowarding loop was so hand-tuned for
the particular Alpha microprocessor cache system) that doing the
memory writes to store updated SNMP counters gave a 20% performance hit.

Its an interesting approach, but the memory characteristics of IP
forwarding (and memory pipes of newer CPUs) and price favour FPGAs.