Subject: Re: "dribbling bit"
To: <>
From: David Laight <david@l8s.co.uk>
List: tech-net
Date: 01/20/2003 21:20:42
> My guess was that the cheap head-ends that the ISP's use will
> underflow their tx's and then send an odd number of bits to signal
> that they know something is wrong, but can't do anything about it. At
> least that is the only reason I can think of why only my *external*
> interface does this.
Some of the M$ drivers might do something similar when they have
started transmitting before the copy to the card is complete [1].
Dribbling on underrun ensures that a valid CRC is never generated.
David
[1] A horrid trick designed to use as many cpu cycles as humanely
possible in order to improve the results of certain (probably
Netware) benchmarks.
--
David Laight: david@l8s.co.uk