Michael Graff writes, about livelock:

>It doesn't occur at 100 Mbps or even gigabit traffic.  It happens when
>you send lots and lots of minimal packets.  A DS3 can take down a 100
>Mbps connected Pentium-3 866 Mhz.  I know this from experienced.

Otoh, for well-designed NIC hardware[*], it is a SMOP to tune the
interrupt rate as a function of CPU load: higher load, interrupt less
often (even if you're being hit by tinygrams).

Just another wrinkle on Jeff Mogul's solution to livelock: switch to
polling under heavy load.


[*] Really deep packet DMA buffers, say 512 or 1024, plus the ability
for software to tune interrupt deferral without a chip reset or
something equally gross.