Jonathan Stone wrote:
> PCMCIA-style CIS tuples. Or PCI-style vendor/device/rev.
> "dmesg or other output detailing hardware version",

Aww, yes:

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# pcictl pci0 list
000:00:0: Advanced Micro Devices Elan SC520 System Controller (host bridge)
000:17:0: Atheros Communications AR5212 Wireless LAN (ethernet network, 
revision
  0x01)
000:18:0: National Semiconductor DP83815 10/100 Ethernet (ethernet network)
000:19:0: National Semiconductor DP83815 10/100 Ethernet (ethernet network)
000:20:0: National Semiconductor DP83815 10/100 Ethernet (ethernet network)
*********************************************
# pcictl pci0 dump -d 17
PCI configuration registers:
   Common header:
     0x00: 0x0013168c 0x02900116 0x02000001 0x00003c10

     Vendor Name: Atheros Communications (0x168c)
     Device Name: AR5212 Wireless LAN (0x0013)
     Command register: 0x0116
       I/O space accesses: off
       Memory space accesses: on
       Bus mastering: on
       Special cycles: off
       MWI transactions: on
       Palette snooping: off
       Parity error checking: off
       Address/data stepping: off
       System error (SERR): on
       Fast back-to-back transact
     Status register: 0x0290
       Capability List support: on
       66 MHz capable: off
       User Definable Features (UDF) support: off
       Fast back-to-back capable: on
       Data parity error detected: off
       DEVSEL timing: medium (0x1)
       Slave signaled Target Abort: off
       Master received Target Abort: off
       Master received Master Abort: off
       Asserted System Error (SERR): off
       Parity error detected: off
     Class Name: network (0x02)
     Subclass Name: ethernet (0x00)
     Interface: 0
     Revision ID: 0x01
     BIST: 0x00
     Header Type: 0x00 (0x00)
     Latency Timer: 0x3c
     Cache Line Size: 0x10

   Type 0 ("normal" device) header:
     0x10: 0xa0000000 0x00000000 0x00000000 0x00000000
     0x20: 0x00000000 0x00000000 0x00005001 0x3a131186
     0x30: 0x00000000 0x00000044 0x00000000 0x1c0a010a

     Base address register at 0x10
       type: 32-bit nonprefetchable memory
       base: 0xa0000000, not sized
     Base address register at 0x14
       not implemented(?)
     Base address register at 0x18
       not implemented(?)
     Base address register at 0x1c
       not implemented(?)
     Base address register at 0x20
       not implemented(?)
     Base address register at 0x24
       not implemented(?)
     Cardbus CIS Pointer: 0x00005001
     Subsystem vendor ID: 0x1186
     Subsystem ID: 0x3a13
     Expansion ROM Base Address: 0x00000000
     Capability list pointer: 0x44
     Reserved @ 0x38: 0x00000000
     Maximum Latency: 0x1c
     Minimum Grant: 0x0a
     Interrupt pin: 0x01 (pin A)
     Interrupt line: 0x0a


     type: 0x01 (Power Management, rev. 1.0)

   Device-dependent header:
     0x40: 0x00000000 0x01c20001 0xc6004000 0x00000000
     0x50: 0x00000000 0x00000000 0x00000000 0x00000000
     0x60: 0x00000000 0x00000000 0x00000000 0x00000000
     0x70: 0x00000000 0x00000000 0x00000000 0x00000000
     0x80: 0x00000000 0x00000000 0x00000000 0x00000000
     0x90: 0x00000000 0x00000000 0x00000000 0x00000000
     0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
*********************************************