Re: wm(4)

[Masanobu SAITOH <msaitoh%execsw.org@localhost>]

Hi.

On 2015/10/29 21:56, Robert Swindells wrote:
> Masanobu SAITOH <msaitoh%execsw.org@localhost> wrote:
>> On 2015/10/29 8:42, Robert Swindells wrote:
>>> From: SAITOH Masanobu <msaitoh%execsw.org@localhost>
>>>> On 2015/10/29 5:05, Robert Swindells wrote:
>>>>> Anyone else having problems with wm(4) in current ?
>>>>>
>>>>> Works fine in a kernel from Oct 5, doesn't do anything in latest version.
>>>>>
>>>>> The dmesg lines are:
>>>>>
>>>>> wm0 at pci3 dev 0 function 0: Intel i82574L (rev. 0x00)
>>>>> wm0: interrupting at ioapic0 pin 17
>>>>
>>>> Not MSI-X but INTx? Are you using Xen dom0 or non x86 machine?
>>>
>>> It is an AMD amd64 machine, not running Xen.
>>
>> There are two other cases that it fallback to INTx:
>>
>> a) Old or broken PCI hostbridge. There is a blacklist in x86/pci/pci_machdep.c
>>     (pci_msi_quirk_tbl).
>>
>> b) A lot of interrupts are assinged to cpu0. On x86, interrupt sources are
>>     managed by cpu_info->ci_isources[]. It's fixed size. Legacy interrupt can
>>     share one entry but MSI/MSI-X can't.
>>
>> I suspect your machine is in b).
>>
>> And I've commit the change which should fix your problem now. Could you test
>> the latest if_wm.c?
> 
> Works fine now, thanks for your help.

 You're welcome.


> The hostbridge isn't listed in the quirks table, it is a RS780.

 If you're OK, could you show me the full dmesg and "cpuctl list"?
(not intrctl but cpuctl)

e.g:

> % cpuctl list
> Num  HwId Unbound LWPs Interrupts Last change              #Intr
> ---- ---- ------------ ---------- ------------------------ -----
> 0    0    online       intr       Mon Aug  3 12:46:18 2015 25  <====
> 1    1    online       intr       Mon Aug  3 12:46:18 2015 0

 I'd like to check avobe value.

 Thanks in advance.


> Robert Swindells
> 


-- 
-----------------------------------------------
                SAITOH Masanobu (msaitoh%execsw.org@localhost
                                 msaitoh%netbsd.org@localhost)