Subject: Re: PCI subsystem on BigEndian.
To: Charles M. Hannum <mycroft@mit.edu>
From: Chris G Demetriou <Chris_G_Demetriou@UX2.SP.CS.CMU.EDU>
List: tech-ports
Date: 04/25/1996 10:24:08
> Chris G Demetriou <Chris_G_Demetriou@UX2.SP.CS.CMU.EDU> writes:
> > A couple of people have suggested to me that there is some need for
> > 'native to bus' and 'bus to native' endianness conversion macros...
> > This could very well be a good use for them.
>
> That's not sufficient. You can have devices that natively speak
> big-endian and natively speak little-endian on the same bus.
However, (as others have pointed out, and i've mulled over
previously), there may be something to be said for always treating
them with a consistent endianness for a given bus.
e.g., some (perhaps including me) would say that PCI devices should
never be put into 'big-endian' mode, because PCI 'wants to be' a
little-endian bus.
Certainly, if you put them into big-endian mode, you may have to code
more in the drivers... Also, for PCI in particular, you run into
interesting cases when the devices are behind bridges...
cgd