* Greg A. Woods <woods@weird.com> [020614 15:56] wrote:
> [ On Friday, June 14, 2002 at 23:15:12 (+0100), David Laight wrote: ]
> 
> > On an SMP system an interrupt on one CPU might cause the scheduler
> > to generate an inter-cpu interrupt to force a different cpu to
> > process switch....
> 
> Hmmm... that's something I hadn't really thought deeply about (one CPU
> interrupting another).  I've studied relatively few SMP hardware
> architectures down to that level -- is such a capability commonly
> available on modern multi-CPU systems?

Yes, you need such facilities for doing TLB shootdowns across CPUs.

-Alfred