Subject: Re: Different speed CPUs show up as same speed
To: None <tech-smp@netbsd.org>
From: Peter Hufnagel <CaptnZilog@aol.com>
List: tech-smp
Date: 06/23/2002 11:49:12
>> At my job we have a bunch of machines down in labs that have custom
>> written code with "calibrated timing loops" written for the specific
>> processor... and now, years after we have pretty much trashed all the
>> 286/386 class machines, we've got guys in the labs looking for "spare"
>> 12-Mhz 286 machines and 386SX/16's "because it would cost us $40k in
>> engineering time to rewrite the code".
>
>Those are probably 'uncalibrated' loops!
>Such tricks as 'jmps .+2' and 'shr al,cx' (when cx is large)
>were used for delays on the 286. Some of that code worked
>for a long time - typically because no one had allowed for the
>time taken to call the delay routine.
>
>The kernel (probably) has a bit if code run during startup
>that determines how many times it goes around a tight loop
>between 2 clock ticks. This is used to calibrate loop
>delays - often used for microsecond delays.
Kernel? Oh, you mean DOS 3.2?
These were programs written to, say, send a single-bit pulse out
the parallel port, then delay say 2ms, and send the next pulse out.
Or write a pulse out, and then wait for a pulse in 'reply' to it and
based on the loop count, determine the time lapse. A lot of things
that could have been calculated based on the Timer chip internal to
the PC instead. True, the instructions *around* getting the timer
value or such would take time, but as far as I know accuracy of several
microseconds is not needed (the time of a few instructions changing
wouldn't affect it based on Timer, while it would drastically affect
the timing of a loop). Even back then, boards were available that
could do this is hardware... of course, they were ISA boards. Nobody
wants to spend the money to buy new hardware and update the code...