This looks like a disagreement about bus numbering.

The PCI configuration code seems to think the bridge device is PCI bus #3:

pci2 at ppb1 bus 3
tlp0 at pci2 dev 4 function 0: DECchip 21140A Ethernet, pass 2.2
pci_intr_map: bus 3 dev 4 func 0 pin 1; line 10
...
tlp1 at pci2 dev 5 function 0: DECchip 21140A Ethernet, pass 2.2
pci_intr_map: bus 3 dev 5 func 0 pin 2; line 11
...
tlp2 at pci2 dev 6 function 0: DECchip 21140A Ethernet, pass 2.2
pci_intr_map: bus 3 dev 6 func 0 pin 3; line 11
...
tlp3 at pci2 dev 7 function 0: DECchip 21140A Ethernet, pass 2.2
pci_intr_map: bus 3 dev 7 func 0 pin 4; line 11

.. while there are interrupt map table entries for these devices on PCI bus #2:

ioapic0: int18 attached to pci2 device 4 INT_A (type 0<type=0> flags f<pol=3=Act Lo,trig=3=Level>)
...
ioapic0: int19 attached to pci2 device 5 INT_A (type 0<type=0> flags f<pol=3=Act Lo,trig=3=Level>)
ioapic0: int16 attached to pci2 device 6 INT_A (type 0<type=0> flags f<pol=3=Act Lo,trig=3=Level>)
ioapic0: int17 attached to pci2 device 7 INT_A (type 0<type=0> flags f<pol=3=Act Lo,trig=3=Level>)

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It's not immediately clear to me why the ppb is configured as PCI bus
#3 rather than #2.

						- Bill