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Regression of GCC >= 4.8.5 for 32-bit powerpc
GCC >= 4.8.5 passes ".machine ppc" pseudo-op to assembler for 32-bit
powerpc:
src/external/gpl3/gcc/dist/gcc/config/rs6000/rs6000.c
5187 #ifdef USING_ELFOS_H
5188 if (rs6000_default_cpu == 0 || rs6000_default_cpu[0] == '\0'
5189 || !global_options_set.x_rs6000_cpu_index)
5190 {
5191 fputs ("\t.machine ", asm_out_file);
5192 if ((rs6000_isa_flags & OPTION_MASK_DIRECT_MOVE) != 0)
5193 fputs ("power8\n", asm_out_file);
5194 else if ((rs6000_isa_flags & OPTION_MASK_POPCNTD) != 0)
5195 fputs ("power7\n", asm_out_file);
5196 else if ((rs6000_isa_flags & OPTION_MASK_CMPB) != 0)
5197 fputs ("power6\n", asm_out_file);
5198 else if ((rs6000_isa_flags & OPTION_MASK_POPCNTB) != 0)
5199 fputs ("power5\n", asm_out_file);
5200 else if ((rs6000_isa_flags & OPTION_MASK_MFCRF) != 0)
5201 fputs ("power4\n", asm_out_file);
5202 else if ((rs6000_isa_flags & OPTION_MASK_POWERPC64) != 0)
5203 fputs ("ppc64\n", asm_out_file);
5204 else
5205 fputs ("ppc\n", asm_out_file);
5206 }
5207 #endif
This pseudo-op discards CPU type specified by compiler option
"-mcpu=XXX" or "-Wa,-mXXX". As a result, some mnemonics are misassembled
into instructions for generic ppc. This results in broken kernel for IBM
405, where indices of some special purpose registers are different from
those in generic ppc, cf. port-powerpc/51366:
http://gnats.netbsd.org/51366
This is a clearly regression of GCC. The logic raised above seem to be
intended for 64-bit powerpc; without it, gas cannot assemble codes
generated by GCC for 64-bit powerpc. I therefore propose to restrict
usage of ".machine" pseudo-op to the 64-bit machines like this:
====
--- src/external/gpl3/gcc/dist/gcc/config/rs6000/rs6000.c.orig 2016-07-26 20:35:20.391415369 +0900
+++ src/external/gpl3/gcc/dist/gcc/config/rs6000/rs6000.c 2016-07-26 21:07:17.973106045 +0900
@@ -5185,8 +5185,13 @@
}
#ifdef USING_ELFOS_H
- if (rs6000_default_cpu == 0 || rs6000_default_cpu[0] == '\0'
- || !global_options_set.x_rs6000_cpu_index)
+/*
+ * XXX .machine overrides CPU type specified by -mcpu or -Wa,-m options, which
+ * can result in corrupted output with inline assembler for ppc32.
+ */
+ if ((rs6000_default_cpu == 0 || rs6000_default_cpu[0] == '\0'
+ || !global_options_set.x_rs6000_cpu_index)
+ && (rs6000_isa_flags & OPTION_MASK_POWERPC64) != 0)
{
fputs ("\t.machine ", asm_out_file);
if ((rs6000_isa_flags & OPTION_MASK_DIRECT_MOVE) != 0)
@@ -5199,10 +5204,8 @@
fputs ("power5\n", asm_out_file);
else if ((rs6000_isa_flags & OPTION_MASK_MFCRF) != 0)
fputs ("power4\n", asm_out_file);
- else if ((rs6000_isa_flags & OPTION_MASK_POWERPC64) != 0)
- fputs ("ppc64\n", asm_out_file);
else
- fputs ("ppc\n", asm_out_file);
+ fputs ("ppc64\n", asm_out_file);
}
#endif
====
Could I commit this patch? Any comments or suggestions?
Thanks,
Rin
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