Re: SmartFirmware interrupts

[Frank Wille <frank%phoenix.owl.de@localhost>]

Matt Sealey wrote:

>> Hm. Which information does SmartFirmware provide about it? The only thing
>> I found was "8259-IRQ at f1000cb4". This is for the ISA interrupts?
> 
> It's connected in a cascade to the Marvell chip. You do not need to know
> how the Marvell PIC works. Just use the 8259 (as is present in every PC
> known to man..)

Addendum: After looking at the source, I'm still confused.

Usually the first 8259 PIC is at I/O address 0x20 and the second at 0xa0. But
the I/O space of the first pci-node is e.g. mapped at 0xfe000000 on the Peg2.

How does an address of 0xf1000cb4 help me now? Is it the memory-mapped
base address of the first PIC? But where are the registers for the second
one? 0x80 bytes from there?

-- 
    _  Frank Wille (frank%phoenix.owl.de@localhost)
 _ //  http://sun.hasenbraten.de/~frank/
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