On 29/06/2020 18:40, Jaromír Doleček wrote:
> It's possible INTx are disabled by BIOS. 9.0 by default uses MSI
> interrupts, 9.0 Xen only knows to use INTx.
>
> Can you send output of 'pcictl pci0 dump -d 0' and 'pcictl pci0 dump -d 31' ?
Just to clarify, what context should I do that in?
- The 9.0 XEN3_DOM0 kernel (where the disk doesn't work and I'd like it do)
- The 9.0 GENERIC kernel (where the disk does work so I was able to
install the system)
- The 7.0.1 XEN3_DOM0 kernel (that is currently running so I can do it
without rebooting, which doesn't see the disks)?
If it's one of the 9.0 kernels I'll do it this weekend, when I can take
the system down for a bit, but if the results under 7.0.1 will suffice
because it'll tell you what state the BIOS leaves the system in at
boot... you can have them now:
$ pcictl pci0 dump -d 0
PCI configuration registers:
Common header:
0x00: 0x0c008086 0x20900006 0x06000006 0x00000000
Vendor Name: Intel (0x8086)
Device Name: Haswell Host Bridge, DRAM (0x0c00)
Command register: 0x0006
I/O space accesses: off
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x2090
Interrupt status: inactive
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: fast (0x0)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: on
Asserted System Error (SERR): off
Parity error detected: off
Class Name: bridge (0x06)
Subclass Name: host (0x00)
Interface: 0x00
Revision ID: 0x06
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x00
Cache Line Size: 0bytes (0x00)
Type 0 ("normal" device) header:
0x10: 0x00000000 0x00000000 0x00000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x50001458
0x30: 0x00000000 0x000000e0 0x00000000 0x00000000
Base address register at 0x10
not implemented(?)
Base address register at 0x14
not implemented(?)
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x1458
Subsystem ID: 0x5000
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0xe0
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x00 (none)
Interrupt line: 0x00
Capability register at 0xe0
type: 0x09 (Vendor-specific)
PCI Vendor Specific Capabilities Register
Capabilities length: 0x0c
Device-dependent header:
0x40: 0xfed19001 0x00000000 0xfed10001 0x00000000
0x50: 0x00000211 0x00000031 0xbf900017 0xbb000001
0x60: 0xf8000005 0x00000000 0xfed18001 0x00000000
0x70: 0xff000000 0x00000003 0xff000c00 0x0000007f
0x80: 0x00111110 0x00110000 0x0000001a 0x00000000
0x90: 0xff000001 0x00000003 0x3f500001 0x00000004
0xa0: 0x00000001 0x00000004 0x3f600001 0x00000004
0xb0: 0xbba00001 0xbb800001 0xbb000000 0xbfa00001
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x010c0009 0x6204a06d 0x444400d0 0x00000000
0xf0: 0x00000000 0x00030fc8 0x00000000 0x00000000
$ pcictl pci0 dump -d 31
PCI configuration registers:
Common header:
0x00: 0x8c448086 0x02100007 0x06010004 0x00800000
Vendor Name: Intel (0x8086)
Device Name: Z87 LPC (0x8c44)
Command register: 0x0007
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x0210
Interrupt status: inactive
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: bridge (0x06)
Subclass Name: ISA (0x01)
Interface: 0x00
Revision ID: 0x04
BIST: 0x00
Header Type: 0x00+multifunction (0x80)
Latency Timer: 0x00
Cache Line Size: 0bytes (0x00)
Type 0 ("normal" device) header:
0x10: 0x00000000 0x00000000 0x00000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x50011458
0x30: 0x00000000 0x000000e0 0x00000000 0x00000000
Base address register at 0x10
not implemented(?)
Base address register at 0x14
not implemented(?)
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x1458
Subsystem ID: 0x5001
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0xe0
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x00 (none)
Interrupt line: 0x00
Capability register at 0xe0
type: 0x09 (Vendor-specific)
PCI Vendor Specific Capabilities Register
Capabilities length: 0x0c
Device-dependent header:
0x40: 0x00001801 0x00000080 0x00001c01 0x00000010
0x50: 0x000000f8 0x00000000 0x00000000 0x00000000
0x60: 0x0a0b0a0b 0x00000090 0x05038005 0x0000f0f8
0x70: 0xf078f078 0xf078f078 0xf078f078 0xf078f078
0x80: 0x14010000 0x003c0a01 0x00000000 0x00000000
0x90: 0x00000000 0x00000f00 0x00000000 0x00000000
0xa0: 0x18a05e08 0x00063808 0x00004600 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00112233 0x00004567 0x0000ffcf 0x00000008
0xe0: 0x100c0009 0x00000000 0x9100e801 0x00000000
0xf0: 0xfed1c001 0x00000000 0x08050fb1 0x00000000
>
> Jaromir
>
Thanks!
--
Alaric Snell-Pym (M7KIT)
http://www.snell-pym.org.uk/alaric/
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