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CVS commit: src/sys/arch/arm/iomd
Module Name: src
Committed By: skrll
Date: Sat Nov 21 19:52:56 UTC 2020
Modified Files:
src/sys/arch/arm/iomd: iomd_irq.S
Log Message:
Adjust code and register usage so that r4 and r5 are preserved as
cur{cpu,lwp} respectively as required by the change to make ASTs
operate per-LWP rather than per-CPU. These registers are used by
DO_AST_AND_RESTORE_ALIGNMENT_FAULTS expecting this usage.
XXX untested
To generate a diff of this commit:
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/arm/iomd/iomd_irq.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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