CVS commit: src/sys/arch/arm/xscale

["Nick Hudson" <skrll%netbsd.org@localhost>]

Module Name:    src
Committed By:   skrll
Date:           Sat Nov 21 19:55:49 UTC 2020

Modified Files:
        src/sys/arch/arm/xscale: i80200_irq.S

Log Message:
Adjust egister usage so that r4 and r5 are preserved as cur{cpu,lwp}
respectively as required by the change to make ASTs operate per-LWP
rather than per-CPU.  DO_AST_AND_RESTORE_ALIGNMENT_FAULTS expects this.

XXX untested


To generate a diff of this commit:
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/arm/xscale/i80200_irq.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.