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CVS commit: src/sys/dev/eisa
Module Name: src
Committed By: thorpej
Date: Sat Jul 24 15:44:16 UTC 2021
Modified Files:
src/sys/dev/eisa: ahbreg.h
Log Message:
Correct the comment about the INTHIGH bit in the INTDEF register. It
does indeed mean "IRQ signal is active-high", but "else edge" is not
correct; level-triggered EISA interrupt are active-low, and edge-triggered
EISA interrupts are rising-edge, so INTHIGH would in fact mean "edge".
To generate a diff of this commit:
cvs rdiff -u -r1.16 -r1.17 src/sys/dev/eisa/ahbreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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