Source-Changes archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
CVS commit: src/sys/dev/eisa
Module Name: src
Committed By: thorpej
Date: Sat Jul 24 15:52:16 UTC 2021
Modified Files:
src/sys/dev/eisa: ahb.c
Log Message:
Don't blindly establish our interrupt handler as IST_LEVEL. If the INTDEF
register has the INTHIGH bit set, the controller is going to keep the
line low when *not* asserting an interrupt, and since EISA level-tiggered
interrupts are active-low, this would result in a forever-interrupt-storm.
So, if INTHIGH is set in INTDEF, establish our interrupt handler as
IST_EDGE, which will program the EISA PIC to detect the interrupt on
the rising edge of the IRQ line.
To generate a diff of this commit:
cvs rdiff -u -r1.66 -r1.67 src/sys/dev/eisa/ahb.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Home |
Main Index |
Thread Index |
Old Index