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Re: mips SOFTFLOAT status ?
On Jan 28, 2010, at 4:20 AM, Manuel Bouyer wrote:
> On Thu, Jan 28, 2010 at 12:12:56PM +0100, Manuel Bouyer wrote:
>> On Thu, Jan 28, 2010 at 12:08:14PM +0100, Martin Husemann wrote:
>>> On Thu, Jan 28, 2010 at 12:03:13PM +0100, Manuel Bouyer wrote:
>>>> It is working for someone else ?
>>>
>>> This used to work fine for me:
>>>
>>> cpu0: Alchemy Au1500 (Rev 2 core) (0x1030202) Rev. 2 with software
>>> emulated floating point
>>
>> thanks, this probably means there's something wrong with the trap handler,
>> or maybe even with the underlying hardware.
>
> OK, it turns out that our processor model doesn't take a trap on all
> FPU instructions ...
> sorry for the noise.
You don't get a COP2 unavailable exception? Wow. What chip is this?
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