Re: NetBSD for LIP6 TSAR?

[Manuel Bouyer <bouyer%antioche.eu.org@localhost>]

On Thu, Feb 04, 2010 at 07:28:47PM +0900, Toru Nishimura wrote:
> Manuel Bouyer said;
> 
> >>Wow.  What chip is this?
> >
> >this one:
> >https://www-soc.lip6.fr/trac/tsar/
> >
> >well, this chip doesn't really exist yet, but we a systemC model :)
> >We hope to have a working FPGA implementation by the end of the year.
> 
> Um, it's very first time NetBSD developer mentions to LIP6 TSAR project, as
> long as I know.  I've been wondering whether NetBSD would be ported to
> TSAR.  So, the world can expect it will happen in future, right?

Yes, in fact I have it booting single user already, using a
CABA/SystemC model. My plan it to have the NetBSD/TSAR port in
the NetBSD CVS some day, but I'm waiting for a debugged and useable
hardware platform first (and also for the mips64 branch to be merged in
HEAD - even though TSAR is 32bits, there is work being done on SMP is valuable
for us :). The simulator runs at about 250Khz on a decent
x86 system, it's too slow to attempt anything other than single-user.
Work is underway to have a much faster simulator, as well as a FPGA
implementation. One of the targets is Altera's DE-2 board which is
not too expensive, so I hope NetBSD/TSAR can find some use outside of
our lab ...

-- 
Manuel Bouyer <bouyer%antioche.eu.org@localhost>
     NetBSD: 26 ans d'experience feront toujours la difference
--