Re: What does mfspr(SPR_L2CR);?

[Jochen Kunz <jkunz%unixag-kl.fh-kl.de@localhost>]

On Fri, 17 Dec 2004 10:55:40 -0800
Matt Thomas <matt%3am-software.com@localhost> wrote:

> At 10:25 AM 12/17/2004, David Edelsohn wrote:
> > Some SPR values are processor-dependent.  The SPR_L2CR value may
> >be incorrect for the processor on which you are booting (604e).
> Does the 604ev even have a L2?  I haven't been able to find a 604ev
> programming manual online (Looked at Freescale or IBM websites).
>From a look at the main board I can see two chips labeled "Motorola
MCM69P737TQ4". Google tels me this are "128K x 36 Bit Pipelined BurstRAM
Synchronous Fast Static RAM". So it looks like this CPU has off chip L2
cache.

Further investigation: src/sys/arch/powerpc/oea/cpu_subr.c version 1.14
works, version 1.15 causes the trap. Due to ENOCLUEABOUTPPC I can't fix
this, but I'll happily test new revisions of that file.
-- 


tschüß,
       Jochen

Homepage: http://www.unixag-kl.fh-kl.de/~jkunz/