Re: when and how to enable caches

[Frank Wille <frank%phoenix.owl.de@localhost>]

Tim Rightnour wrote:

>> locore is entered with caches disabled, MMU disabled, BATs and SRs
>> invalidated. MSR has only the IP-bit set.
>> 
>> Anybody remembers a similar problem? Any idea what I could check or try?
> 
> What kind of CPU is that exactly?

A 233MHz 604e. No L2-cache present.


> some of the CPU's have a very specific
> set of operations you have to perform in a very specific order to turn
> caches on and off. Its usually documented in one of the CPU manuals.

I'm reading the 604 User's Manual, but I didn't find examples for such a
sequence.

BTW, I tried the same sequence to enable/invalidate caches on my Efika (5200B),
which has caches already enabled in OF, and it crashed too!


I cannot continue without caches, because when calling main() there is a dcbz
somewhere, which would crash with caches disabled...

-- 
    _  Frank Wille (frank%phoenix.owl.de@localhost)
 _ //  http://sun.hasenbraten.de/~frank/
 \X/   Phx @ #AmigaGer