On 2023-09-27 13:18, Stellan Lagerström wrote:
On 2023-09-25 20:28, Johnny Billquist wrote:The way it was explained to me, is that if there is no memory cache, busy-waiting uses the bus, competing with DMA from, say, disk controllers. So a WAIT instruction improves performance in the common case of all processes waiting for I/O or timers.On 2023-09-25 20:17, Paul Koning wrote:On Sep 25, 2023, at 2:06 PM, Andrew Ball <asbatwrk%gmail.com@localhost> wrote:I wonder why VAX lacked that when the PDP-11 had it. My emulated VAX runs NetBSD/vax 9.3.The VAX architects apparently didn't see the need for WAIT, or they felt it was too much trouble to implement. In any case, it isn't part of the instruction set. Instead, when there is nothing else to do, you tend to be in a loop in the scheduler looking for action. What that looks like depends on the OS.At the time, a WAIT didn't seem like it would add any value on the VAX. I think they just simply thought that WAIT on the PDP-11 wasn't really that useful for anything more than making pretty patterns on the front panel, and the VAX don't have a front panel anyway...Of course, as soon as you started talking about virtual machines, it did make sense again. So I think there is something in VARM about this, but I don't think anything implemented, or used it. Hindsight and all that...
True. DMA bus reqeusts are usually only granted at the end of the execution of an instruction, so with WAIT, that would be immediately.
But we're talking about on average the time of half of one instruction in this case. Which is a pretty short time. Agreed, not zero, but not that significant either. And it would only make a difference on a machine that was idle. If it was busy, you'd still have that slight delay.
And for a machine that is idle anyway, that marginal delay on a DMA grant is really questionable what kind of penalty it is. Any actual action will only happen once something like the disk have completed the full transfer, at which point you'll have an interrupt, which needs to be processed, and things worked out from. Which is a huge amount of time compared to what delay was incurred by the DMA delay here. Not to mention that delay is nothing compared to the amount of time a disk takes to seek to the right track, and actually transfer it over to memory. Basically, apart from the last byte pushed over by DMA, that delay is irrelevant, since you are still waiting for the full transfer to be completed, which is limited by the transfer rate from the disk, not the DMA response speed.
So I'd say it's basically small enough to not matter. Same for interrupts, which is what timers would be about. On the idle machine, the interrupt is delayed in average half the time of one instruction.
The VAX had cache from day one, so busy-waiting was simpler and never reached the SBI.
That is also true.
Johnny
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