[src/trunk]: src/gnu/dist/toolchain/gdb/config/arm Correct a comment: NetBSD ...

[bjh21 <bjh21%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/04f4d664acf9
branches:  trunk
changeset: 516395:04f4d664acf9
user:      bjh21 <bjh21%NetBSD.org@localhost>
date:      Mon Oct 22 19:07:10 2001 +0000

description:
Correct a comment: NetBSD uses an undefined instruction as a breakpoint,
not a SWI.

diffstat:

 gnu/dist/toolchain/gdb/config/arm/tm-arm.h |  9 ++++-----
 1 files changed, 4 insertions(+), 5 deletions(-)

diffs (19 lines):

diff -r a5688e29e5a4 -r 04f4d664acf9 gnu/dist/toolchain/gdb/config/arm/tm-arm.h
--- a/gnu/dist/toolchain/gdb/config/arm/tm-arm.h        Mon Oct 22 18:58:50 2001 +0000
+++ b/gnu/dist/toolchain/gdb/config/arm/tm-arm.h        Mon Oct 22 19:07:10 2001 +0000
@@ -92,11 +92,10 @@
    Even this may only true if the condition predicate is true. The
    following use a condition predicate of ALWAYS so it is always TRUE.
    
-   There are other ways of forcing a breakpoint.  ARM Linux, RISC iX,
-   and NetBSD will all use a software interrupt rather than an
-   undefined instruction to force a trap.  This can be handled by
-   redefining some or all of the following in a target dependent
-   fashion.  */
+   There are other ways of forcing a breakpoint.  ARM Linux and
+   RISC iX will use a software interrupt rather than an undefined
+   instruction to force a trap.  This can be handled by redefining
+   some or all of the following in a target dependent fashion.  */
 
 #define ARM_LE_BREAKPOINT {0xFE,0xDE,0xFF,0xE7}
 #define ARM_BE_BREAKPOINT {0xE7,0xFF,0xDE,0xFE}